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Datasheet 74AUP1G86 Equivalent ( PDF ) |
N.º | Número de pieza | Descripción | Fabricantes | |
3 | 74AUP1G86 | Low Power 2-Input EXCLUSIVE-OR Gate
74AUP1G86
Low-power 2-input EXCLUSIVE-OR gate
Rev. 01 — 9 August 2004 Product data sheet
1. General description
The 74AUP1G86 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at |
NXP Semiconductors |
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2 | 74AUP1G86 | SINGLE 2-INPUT EXCLUSIVE-OR GATE 74AUP1G86
SINGLE 2-INPUT EXCLUSIVE-OR GATE
Description
The Advanced, Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.
Pin Assignments
The 74AUP1G86 is a single, two-input, positive exclusive-OR gate with a standard push-pull out |
Diodes |
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1 | 74AUP1G86FS3-7 | SINGLE 2-INPUT EXCLUSIVE-OR GATE 74AUP1G86
SINGLE 2-INPUT EXCLUSIVE-OR GATE
Description
The Advanced, Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.
Pin Assignments
The 74AUP1G86 is a single, two-input, positive exclusive-OR gate with a standard push-pull out |
Diodes |
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Número de pieza | Descripción | Fabricantes | |
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