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SN74LS73A Datasheet PDF File
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| SN74LS73A Description |
Dual J-K Flip-Flops With Clear
 Texas Instruments |
| DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
The SN54LS , 74LS73A offers individual J, K, clear, and clock inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may be allowed to change when the clock pulse is HIGH and the bistable will perform according to the truth table as long as minimum set-up times are observed. Input data is transferred to the outputs on the negative-going edge of
 Motorola Semiconductors |
| DataSheet.es | 2020 | Contacto |