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MC74AC109 PDF File ( Datasheet )

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MC74AC109DR2
AC Series Dual Positive Edge Triggered J-kbar Flip-flop Complementary Output PDSO16
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MC74AC109 Description
Dual JK Positive Edge Triggered Flip-Flop

. U 4 Dual JK Positive t e Edge-Triggered Flip-Flop e h The MC74AC109, 74ACT109 consists of two high speed S transition clocked completely independent JK flip flops. The clocking a t operation a is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip flop (refer to .D MC74AC74, 74ACT74 data sheet) by connecting the J and K inputs w together. w Inputs: w Asynchronous LOW input to SD (Set) sets Q to HIGH level LOW input to CD (Clear) sets Q to LOW l

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