MC100E167 PDF File ( Datasheet )

MOTOROLA SEMICONDUCTOR TECHNICAL DATA 6 Bit 2:1 Mux Register The MC10E, 100E167 contains six 2:1 multiplexers followed by D flip-flops with single-ended outputs. Input data are selected by the Select control, SEL. The selected data are transferred to the flip-flop outputs by a positive edge on CLK1 or CLK2 (or both). A HIGH on the Master Reset (MR) pin asynchronously forces all Q outputs LOW. 1000MH- Min. Operating Frequency 800ps Max. Clock to Output Single-Ended Outputs Asynchronous Mas

MC10E167, MC100E167 5V ECL 6-Bit 2:1 MUX-Register Description The MC10E, 100E167 contains six 2:1 multiplexers followed by D flip-flops with single-ended outputs. Input data are selected by the Select control, SEL. The selected data are transferred to the flip-flop outputs by a positive edge on CLK1 or CLK2 (or both). A HIGH on the Master Reset (MR) pin asynchronously forces all Q outputs LOW. Features http:, , onsemi.com The 100 Series contains temperature compensation. 1