LTC6950 PDF File ( Datasheet )

Features LTC6950 1.4GH- Low Phase Noise, Low Jitter PLL with Clock Distribution Description n Low Phase Noise and Jitter n Additive Jitter: 18fsRMS (12kH- to 20MHz) n Additive Jitter: 85fsRMS (10H- to Nyquist) n EZSync™ Multichip Clock Edge Synchronization n Full PLL Core with Lock Indicator n 226dBc, H- Normalized In-Band Phase Noise Floor n 274dBc, H- Normalized 1, f Phase Noise n 1.4GH- Maximum VCO Input Frequency n Four Independent, Low Noise 1.4GH- LVPECL Outputs n One LVDS, CM