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DM74LS109 PDF File ( Datasheet )

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DM74LS109AN
J-Kbar Flip-Flop, LS Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, TTL, PDIP16

PDF Datasheet
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DM74LS109 Description
Dual Pos Edge Trig J- FFlops w/Prest Clear Comp Out (Rev. A)

Texas Instruments
Texas Instruments
Dual Positive-Edge-Triggered J-K Flip-Flop with Preset/ Clear/ and Complementary Outputs

DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs June 1986 Revised March 2000 DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a voltage level and is not directly
Fairchild Semiconductor
Fairchild Semiconductor



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