CD4006BM PDF File ( Datasheet )

CD4006BM CD4006BC 18-Stage Static Shift Register February 1988 CD4006BM CD4006BC 18-Stage Static Shift Register General Description The CD4006BM CD4006BC 18-stage static shift register is comprised of four separate shift register sections two sections of four stages and two sections of five stages Each section has an independent data input Outputs are available at the fourth stage and the fifth stage of each section A common clock signal is used for all stages Data is shifted to the next stag

CD4007C Dual Complementary Pair Plus Inverter October 1987 Revised January 1999 CD4007C Dual Complementary Pair Plus Inverter General Description The CD4007C consists of three complementary pairs of Nand P-channel enhancement mode MOS transistors suitable for series, shunt applications. All inputs are protected from static discharge by diode clamps to VDD and VSS. For proper operation the voltages at all pins must be constrained to be between VSS 0.3V and VDD + 0.3V at all times. Features s