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ADSP-SC571 PDF File ( Datasheet )

Analog Devices
ADSP-SC571KSWZ-5
DSP Fixed-Point/Floating-Point 32bit/40bit/64bit 500MHz 800MIPS 176-Pin LQFP EP Tray

PDF Datasheet
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ADSP-SC571 Description
SHARC+ Dual Core DSP

SHARC+ Dual Core DSP with ARM Cortex-A5 Preliminary Technical Data ADSP-SC570, 571, 572, 573, ADSP-21571, 21573 SYSTEM FEATURES Dual enhanced SHARC+ high performance floating-point cores Up to 450 MH- per SHARC+ core Up to 3M bits (384 kB) L1SRAM memory per core with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed point Byte, short-word, word, long-word addressed ARM Cortex-A5 core 450 MHz, 720 DMIPS with Neon, VFPv4-D16, Jazelle 3
Analog Devices
Analog Devices



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