ADSP-21MSP5X PDF File ( Datasheet )

a SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier, Accumulator, and Shifter Single-Cycle Instruction Execution & Multifunction Instructions On-Chip Program Memory RAM or ROM & Data Memory RAM Integrated I, O Peripherals: Serial Ports, Timer, Host Interface Port (ADSP-2111 Only) FEATURES 25 MIPS, 40 ns Maximum Instruction Rate Separate On-Ch

a SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier, Accumulator, and Shifter Single-Cycle Instruction Execution & Multifunction Instructions On-Chip Program Memory RAM or ROM & Data Memory RAM Integrated I, O Peripherals: Serial Ports, Timer, Host Interface Port (ADSP-2111 Only) FEATURES 25 MIPS, 40 ns Maximum Instruction Rate Separate On-Ch