AD9520-0 PDF File ( Datasheet )

Data Sheet 12 LVPECL, 24 CMOS Output Clock Generator with Integrated 2.8 GH- VCO AD9520-0 FEATURES Low phase noise, phase-locked loop (PLL) On-chip VCO tunes from 2.53 GH- to 2.95 GH- Optional external 3.3 V, 5 V VCO, VCXO to 2.4 GH- 1 differential or 2 single-ended reference inputs Accepts CMOS, LVDS, or LVPECL references to 250 MH- Accepts 16.62 MH- to 33.3 MH- crystal for reference input Optional reference clock doubler Reference monitoring capability Automatic, manual reference holdover an