74VHC132 PDF File ( Datasheet )

74VHC132 QUAD 2-INPUT SCHMITT NAND GATE s HIGH SPEED: tPD = 3.9 ns (TYP.) at VCC = 5V s LOW POWER DISSIPATION: ICC = 2 A (MAX.) at TA=25°C s TYPICAL HYSTERESIS: Vh = 1V at VCC = 4.5V s POWER DOWN PROTECTION ON INPUTS )s SYMMETRICAL OUTPUT IMPEDANCE: t(s|IOH| = IOL = 8 mA (MIN) cs BALANCED PROPAGATION DELAYS: utPLH tPHL ds OPERATING VOLTAGE RANGE: roVCC(OPR) = 2V to 5.5V Ps PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 132 tes IMPROVED LATCH-UP IMMUNITY les LOW NOISE: VOLP = 0.8V (MAX.) bso

74VHC132 Quad 2-Input NAND Schmitt Trigger December 2007 74VHC132 Quad 2-Input NAND Schmitt Trigger Features - High Speed: tPD = 3.9ns (Typ.) at VCC = 5V - Power down protection is provided on all inputs - Low power dissipation: ICC = 2 A (Max.) at TA = 25°C - Low noise: VOLP = 0.8V (Max.) - Pin and function compatible with 74HC132 General Description The VHC132 is an advanced high speed CMOS 2-input NAND Schmitt Trigger Gate fabricated with silicon gate CMOS technology. It achieves the hi