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74LVC1G175 PDF File ( Datasheet )
Nexperia
74LVC1G175GW,125
D Flip-Flop, LVC/LCX/Z Series, 1-Func, Positive Edge Triggered, True Output, CMOS, PDSO6
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| Future Electronics | 12,000 | Visit Site | |||
| DigiKey | 37,872 | 0.13 | Visit Site | ||
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| Verical | 1,223 | Visit Site | |||
| TME | 760 | 0.0975 | Visit Site | ||
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| 74LVC1G175 Description |
| Single D-type flip-flop
74LVC1G175
Single D-type flip-flop with reset; positive-edge trigger
Rev. 6 11 October 2013
Product data sheet
1. General description
The 74LVC1G175 is a low-power, low-voltage single positive edge triggered D-type flip-flop with individual data (D) input, clock (CP) input, master reset (MR) input, and Q output.
The master reset (MR) is an asynchronous active LOW input and operates independently of the clock input. Information on the data input is transferred to the Q output on the LOW-to-H
 NXP Semiconductors |
| Single D-type flip-flop
74LVC1G175-Q100
Single D-type flip-flop with reset; positive-edge trigger
Rev. 1 15 November 2013
Product data sheet
1. General description
The 74LVC1G175-Q100 is a low-power, low-voltage single positive edge triggered D-type flip-flop with individual data (D) input, clock (CP) input, master reset (MR) input, and Q output. The master reset (MR) is an asynchronous active LOW input and operates independently of the clock input. Information on the data input is transferred to the Q output on t
NXP Semiconductors |
| Related Part Number |
74LV138DB | 74LVC169 74LVC1G175-Q100 | 74LV86A 74LVC1G3157 | 74LV132A |
| DataSheet.es | 2020 | Contacto |