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| 74LV138D Description |
| 3-to-8 line decoder/demultiplexer
74LV138
3-to-8 line decoder, demultiplexer; inverting
Rev. 4 4 March 2016
Product data sheet
1. General description
The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC138 and 74HCT138.
The 74LV138 is a 3-to-8 line decoder, demultiplexer. It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive active LOW outputs (Y0 to Y7).
There are three enable inputs: two active LOW (E1 and E2) and one ac
NXP Semiconductors |
| 3-to-8 line decoder/demultiplexer
74LV138
3-to-8 line decoder, demultiplexer; inverting
Rev. 4 4 March 2016
Product data sheet
1. General description
The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC138 and 74HCT138.
The 74LV138 is a 3-to-8 line decoder, demultiplexer. It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive active LOW outputs (Y0 to Y7).
There are three enable inputs: two active LOW (E1 and E2) and one ac
NXP Semiconductors |
| Related Part Number |
74LCX125FT | 74LVT245BB 74LVC2G126-Q100 | 74LVC543 74LVC2G00-Q100 | 74LS190 |
| DataSheet.es | 2020 | Contacto |