74F676PC PDF File ( Datasheet )

74F676 16-Bit Serial, Parallel-In, Serial-Out Shift Register April 1988 Revised August 1999 74F676 16-Bit Serial, Parallel-In, Serial-Out Shift Register General Description The 74F676 contains 16 flip-flops with provision for synchronous parallel or serial entry and serial output. When the Mode (M) input is HIGH, information present on the parallel data (P0 P15) inputs is entered on the falling edge of the Clock Pulse (CP) input signal. When M is LOW, data is shifted out of the most significan

54F 74F676 16-Bit Serial Parallel-In Serial-Out Shift Register December 1994 54F 74F676 16-Bit Serial Parallel-In Serial-Out Shift Register General Description The ’F676 contains 16 flip-flops with provision for synchronous parallel or serial entry and serial output When the Mode (M) input is HIGH information present on the parallel data (P0 P15) inputs is entered on the falling edge of the Clock Pulse (CP) input signal When M is LOW data is shifted out of the most significant bit position