74AHC594 PDF File ( Datasheet )

74AHC594 8-BIT SHIFT REGISTER WITH 8-BIT OUTPUT REGISTER Description The 74AHC594 is an advanced high speed CMOS device. An eight bit shift register accepts data from the serial input (DS) on each positive transition of the shift register clock (SHCP). When asserted low the shift regisister reset function (SHR) sets all shift register values to zero and is independent of all clocks. Also when asserted low the storage register reset function (STR) sets all shift register values to zero and is in

74AHC594; 74AHCT594 8-bit shift register with output register Rev. 01 4 July 2006 Product data sheet 1. General description The 74AHC594; 74AHCT594 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is speci ed in compliance with JEDEC standard No. 7A. The 74AHC594; 74AHCT594 is an 8-bit, non-inverting, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks (SHCP and STCP) and direct overriding clears