54F825 PDF File ( Datasheet )

54F 74F825 8-Bit D-Type Flip-Flop December 1994 54F 74F825 8-Bit D-Type Flip-Flop General Description The ’F825 is an 8-bit buffered register It has Clock Enable and Clear features which are ideal for parity bus interfacing in high performance microprogramming systems Also included in the ’F825 are multiple enables that allow multiuser control of the interface The ’F825 is functionally and pin compatible with AMD’s Am29825 Features Y TRI-STATE output Y Clock enable and clear Y Multip