54F652 PDF File ( Datasheet )

54F 74F651 54F 74F652 Transceivers Registers Obsolete December 1994 54F 74F651 54F 74F652 Transceivers Registers General Description These devices consist of bus transceiver circuits with D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the input bus or from internal registers Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to HIGH logic level Output Enable pins (OEAB OEBA) are provided to contro