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PDF MCF5475 Data sheet ( Hoja de datos )
| Número de pieza | MCF5475 | |
| Descripción | Processors Reference Manual | |
| Fabricantes | Freescale Semiconductor | |
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MCF547x Reference Manual
Devices Supported:
MCF5475 MCF5472
MCF5474 MCF5471
MCF5473 MCF5470
Document Number: MCF5475RM
Rev. 5
4/2009
1 page  
Chapter 1
Overview
1.1 MCF547x Family Overview ......................................................................................................... 1-1
1.2 MCF547x Block Diagram ............................................................................................................. 1-2
1.3 MCF547x Family Products ........................................................................................................... 1-3
1.4 MCF547x Family Features ............................................................................................................ 1-3
1.4.1 ColdFire V4e Core Overview ....................................................................................... 1-5
1.4.2 Debug Module (BDM) ................................................................................................. 1-6
1.4.3 JTAG ............................................................................................................................. 1-6
1.4.4 On-Chip Memories ....................................................................................................... 1-7
1.4.5 PLL and Chip Clocking Options .................................................................................. 1-7
1.4.6 Communications I/O Subsystem .................................................................................. 1-8
1.4.7 DDR SDRAM Memory Controller ............................................................................ 1-10
1.4.8 Peripheral Component Interconnect (PCI) ................................................................. 1-10
1.4.9 Flexible Local Bus (FlexBus) ..................................................................................... 1-10
1.4.10 Security Encryption Controller (SEC) ........................................................................ 1-11
1.4.11 System Integration Unit (SIU) .................................................................................... 1-11
Chapter 2
Signal Descriptions
2.1 Introduction ................................................................................................................................... 2-1
2.1.1 Block Diagram .............................................................................................................. 2-1
2.2 MCF547x External Signals ......................................................................................................... 2-16
2.2.1 FlexBus Signals .......................................................................................................... 2-16
2.2.2 SDRAM Controller Signals ........................................................................................ 2-18
2.2.3 PCI Controller Signals ................................................................................................ 2-19
2.2.4 Interrupt Control Signals ............................................................................................ 2-21
2.2.5 Clock and Reset Signals ............................................................................................. 2-21
2.2.6 Reset Configuration Pins ............................................................................................ 2-22
2.2.7 Ethernet Module Signals ............................................................................................ 2-24
2.2.8 Universal Serial Bus (USB) ........................................................................................ 2-26
2.2.9 DMA Serial Peripheral Interface (DSPI) Signals ....................................................... 2-26
2.2.10 I2C I/O Signals ........................................................................................................... 2-27
2.2.11 PSC Module Signals ................................................................................................... 2-27
2.2.12 DMA Controller Module Signals ............................................................................... 2-28
2.2.13 Timer Module Signals ................................................................................................ 2-28
2.2.14 Debug Support Signals ............................................................................................... 2-29
2.2.15 Test Signals ................................................................................................................. 2-30
2.2.16 Power and Reference Pins .......................................................................................... 2-30
Freescale Semiconductor
MCF547x Reference Manual, Rev. 5
v
5 Page 
14.3.2 Register Descriptions .................................................................................................. 14-2
Chapter 15
GPIO
15.1 Introduction ................................................................................................................................. 15-1
15.1.1 Overview .................................................................................................................... 15-2
15.1.2 Features ....................................................................................................................... 15-3
15.2 External Pin Description ............................................................................................................. 15-3
15.3 Memory Map/Register Definition ............................................................................................... 15-7
15.3.1 Register Overview ...................................................................................................... 15-7
15.3.2 Register Descriptions .................................................................................................. 15-8
15.4 Functional Description .............................................................................................................. 15-31
15.4.1 Overview .................................................................................................................. 15-31
Chapter 16
32-Kbyte System SRAM
16.1 Introduction ................................................................................................................................. 16-1
16.1.1 Block Diagram ............................................................................................................ 16-1
16.1.2 Features ....................................................................................................................... 16-2
16.1.3 Overview .................................................................................................................... 16-2
16.2 Memory Map/Register Definition ............................................................................................... 16-2
16.2.1 System SRAM Configuration Register (SSCR) ......................................................... 16-3
16.2.2 Transfer Count Configuration Register (TCCR) ....................................................... 16-4
16.2.3 Transfer Count Configuration Register—DMA Read Channel (TCCRDR) .............. 16-5
16.2.4 Transfer Count Configuration Register—DMA Write Channel (TCCRDW) ............ 16-6
16.2.5 Transfer Count Configuration Register—SEC (TCCRSEC) ..................................... 16-7
16.3 Functional Description ................................................................................................................ 16-8
Chapter 17
FlexBus
17.1 Introduction ................................................................................................................................. 17-1
17.1.1 Overview .................................................................................................................... 17-1
17.1.2 Features ....................................................................................................................... 17-1
17.1.3 Modes of Operation .................................................................................................... 17-1
17.2 Byte Lanes ................................................................................................................................... 17-2
17.3 Address Latch .............................................................................................................................. 17-2
17.4 External Signals ........................................................................................................................... 17-3
17.4.1 Chip-Select (FBCS[5:0]) ............................................................................................ 17-4
17.4.2 Address/Data Bus (AD[31:0]) .................................................................................... 17-4
17.4.3 Address Latch Enable (ALE) ..................................................................................... 17-4
17.4.4 Read/Write (R/W) ....................................................................................................... 17-4
17.4.5 Transfer Burst (TBST) ................................................................................................ 17-4
17.4.6 Transfer Size (TSIZ[1:0]) ........................................................................................... 17-4
17.4.7 Byte Selects (BE/BWE[3:0]) ...................................................................................... 17-5
17.4.8 Output Enable (OE) .................................................................................................... 17-5
Freescale Semiconductor
MCF547x Reference Manual, Rev. 5
xi
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MCF5475.PDF ] | |
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