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PDF ADM708 Data sheet ( Hoja de datos )
| Número de pieza | ADM708 | |
| Descripción | Low Cost Microprocessor Supervisory Circuits | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ADM708 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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Low Cost Microprocessor
Supervisory Circuits
ADM705/ADM706/ADM707/ADM708
FEATURES
Guaranteed RESET valid with VCC = 1 V
190 μA quiescent current
Precision supply voltage monitor
4.65 V (ADM705/ADM707)
4.40 V (ADM706/ADM708)
200 ms reset pulse width
Debounced TTL/CMOS manual reset input (MR)
Independent watchdog timer (ADM705/ADM706)
1.60 sec timeout (ADM705/ADM706)
Active high reset output (ADM707/ADM708)
Voltage monitor for power-fail or low battery warning
Superior upgrade for MAX705 to MAX708
APPLICATIONS
Microprocessor systems
Computers
Controllers
Intelligent instruments
Critical microprocessor supply monitoring
GENERAL DESCRIPTION
The ADM705/ADM706/ADM707/ADM708 microprocessor
supervisory circuits are suitable for monitoring 5 V power
supplies/batteries and can also monitor microprocessor activity.
The ADM705/ADM706 provide power-supply monitoring
circuitry that generate a reset output during power-up, power-
down, and brownout conditions. The reset output remains
operational with VCC as low as 1 V. Independent watchdog
monitoring circuitry is also provided. Thisis activated if the
watchdog input has not been toggled within 1.60seconds.
In addition, there is a 1.25 V threshold detector to warn of
power-failures, to detect low battery conditions, or to monitor an
additional power supply. An active low, debounced manual reset
input (MR) is also included.
FUNCTIONAL BLOCK DIAGRAMS
WATCHDOG
INPUT (WDI)
WATCHDOG
TRANSITION
DETECTOR
WATCHDOG
TIMER
WATCHDOG
OUTPUT (WDO)
VCC
MR
VCC
POWER-FAIL
INPUT (PFI)
250μA
4.65V*
1.25V
RESET AND
WATCHDOG
TIMEBASE
RESET
GENERATOR
ADM705/
ADM706
RESET
POWER-FAIL
OUTPUT (PFO)
*VOLTAGE REFERENCE = 4.65V (ADM705), 4.40V (ADM706)
Figure 1. ADM705/ADM706
MR
VCC
POWER-FAIL
INPUT (PFI)
VCC
250μA
4.65V*
1.25V
RESET
GENERATOR
ADM707/
ADM708
RESET
RESET
POWER-FAIL
OUTPUT (PFO)
* VOLTAGE REFERENCE = 4.65V (ADM707), 4.40V (ADM708)
Figure 2. ADM707/ADM708
The ADM705 and ADM706 are identical except for the reset
threshold monitor levels, which are 4.65 V and 4.40 V, respectively.
The ADM707 and ADM708 provide a similar functionality to
the ADM705 and ADM706 and only differ in that a watchdog
timer function is not available. Instead, an active high reset
output (RESET) is available as well as the active low reset output
(RESET). The ADM707 and ADM708 are identical except for
the reset threshold monitor levels, which are 4.65 V and 4.40 V,
respectively.
All parts are available in narrow 8-lead PDIP and 8-lead SOIC
packages.
Rev. G
Information furnished by Analog D evices isbelieved to beaccurate and reliable. However, n o
responsibility isassumed byAnalogDevices for its use,nor for any infringementsofpatentsorother
rights ofthirdpartiesthat may result fromitsuse. Specifications subject to change without notice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksaretheproperty oftheir respective owners.
One T echnology Way, P .O. B ox 91 06, Nor wood, MA 020 62-9106, U. S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.
http://www.Datasheet4U.com
1 page  
ADM705/ADM706/ADM707/ADM708
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
MR 1 ADM705/ 8 WDO
VCC 2 ADM706 7 RESET
GND 3 TOP VIEW 6 WDI
PFI 4 (Not to Scale) 5 PFO
Figure 3. ADM705/ADM706 PDIP/SOIC
Pin Configuration
MR 1 ADM707/ 8 RESET
VCC 2 ADM708 7 RESET
GND 3 TOP VIEW 6 NC
PFI 4 (Not to Scale) 5 PFO
NC = NO CONNECT
Figure 4. ADM707/ADM708 PDIP/SOIC
Pin Configuration
RESET 1 ADM708 8 NC
RESET 2
7 PFO
MR 3 TOP VIEW 6 PFI
VCC 4 (Not to Scale) 5 GND
NC = NO CONNECT
Figure 5. ADM708 MSOP
Pin Configuration
Table 3. Pin Function Descriptions
Pin Number
ADM705/
ADM706
Mnemonic (PDIP, SOIC)
ADM707/
ADM708
(PDIP, SOIC)
MR 1
1
VCC
GND
PFI
PFO
WDI
2
3
4
5
6
2
3
4
5
N/A
NC
RESET
N/A
7
6
7
WDO
8
RESET
N/A
N/A
8
ADM708
(MSOP)
3
4
5
6
7
N/A
8
1
N/A
2
Description
Manual Reset Input. When this pin is taken below 0.8 V, a reset is generated.
MR can be driven from TTL, CMOS logic, or from a manual reset switch as it is
internally debounced. An internal 250 μA pull-up current holds the input high
when floating.
5 V Power Supply Input.
0 V Ground Reference for All Signals.
Power-Fail Input. PFI is the noninverting input to the power-fail comparator.
When PFI is less than 1.25 V, PFO goes low. If unused, PFI should be connected
to GND or VCC.
Power-Fail Output. PFO is the output from the power-fail comparator. It goes
low when PFI is less than 1.25 V.
Watchdog Input. WDI is a three-level input. If WDI remains either high or low
for longer than the watchdog timeout period, the watchdog output (WDO)
goes low. The timer resets with each transition at the WDI input. Either a high-
to-low or a low-to-high transition clears the counter. The internal timer is also
cleared whenever reset is asserted. The watchdog timer is disabled when WDI
is left floating or connected to a three-state buffer.
No Connect.
Logic Output. RESET goes low for 200 ms when triggered. It can be trig-
gered either by VCC being below the reset threshold or by a low signal on the
manual reset input (MR). RESET remains low whenever VCC is below the reset
threshold (4.65 V in ADM705/ADM707, 4.40 V in ADM706/ADM708). It remains
low for 200 ms after VCC goes above the reset threshold or MR goes from low to
high. A watchdog timeout does not trigger RESET unless WDO is connected to MR.
Watchdog Output. WDO remains low until the watchdog timer is cleared. WDO
also goes low during low line conditions. Whenever VCC is below the reset
threshold, WDO goes low if the internal WDO remains low. As soon as VCC goes
above the reset threshold, WDO goes high.
Logic Output. RESET is an active high output suitable for systems that use
active high reset logic. It is the inverse of RESET.
Rev. G | Page 5 of 12
5 Page 
ADM705/ADM706/ADM707/ADM708
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
85
PIN 1
0.210
(5.33)
MAX
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
14
0.100 (2.54)
BSC
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.060 (1.52)
MAX
0.015
(0.38)
MIN
0.015 (0.38)
GAUGE
SEATING PLANE
PLANE
0.005 (0.13)
MIN
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.430 (10.92)
MAX
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
COMPLIANT TO JEDEC STANDARDS MS-001-BA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 22. 8-Lead Plastic Dual-in-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
5.00 (0.1968)
4.80 (0.1890)
8
4.00 (0.1574)
3.80 (0.1497) 1
5
6.20 (0.2440)
4 5.80 (0.2284)
0.25 (0.0098)
1.27 (0.0500)
BSC
1.75 (0.0688)
1.35 (0.0532)
0.50
0.25
(0.0196)
(0.0099)
×
45°
0.10 (0.0040)
0.51 (0.0201)
COPLANARITY
0.10
SEATING
PLANE
0.31 (0.0122)
8°
0.25 (0.0098) 0° 1.27 (0.0500)
0.17 (0.0067)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 23. 8-Lead Standard Small Outline Package [SOIC_N]
(R-8)
Dimensions shown in millimeters and (inches)
3.20
3.00
2.80
3.20
3.00
2.80
8
1
5 5.15
4.90
4.65
4
PIN 1
0.95
0.85
0.75
0.65 BSC
1.10 MAX
0.15
0.00
0.38
0.22
COPLANARITY
0.10
SEATING
PLANE
0.23
0.08
8°
0°
0.80
0.60
0.40
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 24. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Rev. G | Page 11 of 12
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet ADM708.PDF ] | |
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