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PDF MP1493 Data sheet ( Hoja de datos )

Número de pieza MP1493
Descripción 3A 4.2V-16V Input Fast Transient Synchronous Step-down Converter
Fabricantes MPS 
Logotipo MPS Logotipo



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Sy
The Future of Analog IC Technology
DESCRIPTION
The MP14 93 is a f ully integrated, high–
efficiency 3 A synchronous rectifie d step-down
converter. The MP1493 operate s at h igh
efficiency over a wide ou tput current load range.
Adaptive Constant-On-Time (COT) control
mode provi des fast tra nsient resp onse, ease s
loop stabilization, and o perates with a low-cost
electrolytic capacitor.
The MP149 3 r equires a minimum numb er of
readily available sta ndard ext ernal components
and is av ailable in an 8-p in SOIC ROHS
compliant package.
MP1493
3A, 4.2V-16V Input, Fast Transient
nchronous Step-down Converter
FEATURES
Wide 4.2V to 16V Operating Input Range
3A Output Current
Adaptive COT for Fast Transient
Response
Low RDS(ON) Internal Power MOSFETs
Proprietary Switching Loss Reduction
Technique
Programmable Switching Frequency
OCP, SCP, OVP, UVP Protection and
Thermal Shutdown
Optional OCP Protection: Latch-off Mode
and Hiccup Mode
Output Adjustable from 0.805V to 13V
APPLICATIONS
Digital Set Top Boxes
Flat Panel Television and Monitors
Distributed Power Systems
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Quality Assurance. “MPS” and “The
Future of An alog IC Technology” a re Re gistered T rademarks of Mo nolithic
Power Systems, Inc.
TYPICAL APPLICATION
VIN
R7
453k
499k
1 IN
BST 4
MP1493
SW 3
8 FREQ
5 BYP
ON/OFF
6 EN
FB 7
GND
2
VOUT 2.5V
R1
41k
R2
20k
MP1493 Rev. 1.15
www.MonolithicPower.com
12/9/2013
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
1
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MP1493 pdf
MP1493 – 3A, 4.2V-16V INPUT, FAST TRANSIENT SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN=12V, VOUT=1.2V, L=2.2µH, TA=+25°C, unless otherwise noted.
Line Regulation
100
95 VIN=8V
90
85 VIN=12V
80
75
70
65
60
0.01
0.1 1
IOUT (A)
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-0.2 IOUT=3A
-0.4
-0.6
-0.8
-1.0
-1.2
10 3 5 7 9 11 13 15 16
VIN (V)
Load Regulation
1.00
0.80
0.60
0.40
0.20
VIN=12V
0.00
-0.20
-0.40
-0.60
-0.80
-1.00
0 0.5 1 1.5 2 2.5 3
IOUT (A)
30
25
20
15
10
5
0 0 0.5
No air flow
1 1.5 2 2.5 3
IOUT (A)
Frequency vs. Temperature
450
445
440
435
430
425
420
415
410
405
400
-40 -20
0 20 40 60 80 100 120140
VOUT VS. IOUT
VOUT=1.2V, Freq=500kHz
1.24
1.22
1.2 VIN=16V
VIN=12V
1.18
1.16
VIN=8V VIN=5V
1.14
1.12
1.1
0.01
0.1
1 10
IOUT(A)
MP1493 Rev. 1.15
www.MonolithicPower.com
12/9/2013
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
5

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MP1493 arduino
MP1493 – 3A, 4.2V-16V INPUT, FAST TRANSIENT SYNCHRONOUS STEP-DOWN CONVERTER
As can be seen from equation 7, if there is
instability in PWM mod e, we can r educe eith er
R4 or C4. If C4 can not be reduced further due to
limitation fr om equation 4, then we can only
reduce R4. For a stable PWM o peration, th e
Vslope1 should be design follow equation 8.
-Vslope1
TSW
0.7 ×
π
+-T2ON
RESRCOUT
2L×× COUT
VOUT
+
Io ×10-3
TSW -Ton
(8)
Io is the load current.
In skip mode, the downward slope of the V FB
ripple is almost the same wheth er the external
ramp is used or not. Figure 7 shows the
simplified circuit of the skip mode when both the
HS-FET and LS-FET are off.
Figure 7—Simplified Circuit in skip Mode
The downward slope o f the V FB ripple in skip
mode can be determined as follow:
( )VSLOPE2
=
(R
1
VREF
R2 // Ro)
COUT
(9)
Where Ro is the equivalent load resistor.
As described in Figure 4, VSLOPE2 in the skip mode
is lower than that is in the PWM mode, so it is
reasonable that the jitt er in the skip mode is
larger. If o ne wants a system wi th less jitter
during ultra light load co ndition, the values of the
VFB resistors should not be too big, however, that
will decrease the ultra light load efficiency.
Soft Start/Stop
MP1493 employs soft st art/stop (SS) mechanism
to ensure smooth output du ring p ower up and
power shut-down. When the EN pin becomes
high, an int ernal SS voltage ramps up slowly.
The SS voltage takes over the REF voltage to
the PWM comparator. The output voltage
smoothly ramps up with the SS voltage. Once SS
voltage reaches the same level
of the REF
voltage, it keeps ramping up, while REF takes
over the PWM comparator. At this point, the soft
start fin ishes, it enters steady sta te operatio n.
The SS time is about 1ms.
When the EN pin becomes low, th e internal SS
voltage is discharged th rough an internal current
source. On ce the SS voltage r eaches REF
voltage, it takes over the PWM co mparator. The
output volta ge will decr ease smoot hly with SS
voltage until zero level. s
Over-Current Protection (OCP) and Sho
Circuit Protection (SCP)
rt-
MP1493 ha s cycle-by cycle over-current limit
control. The inductor cu rrent is monitored durin g
the ON stat e. And it has two optional OCP/SCP
protection modes: latch-off mode and hiccu p
mode.
For MP149 3DS, the HS-FET turns off when t he
inductor current exceeds the curren t limit and th e
OCP ti mer—set at 50 μs—starts. The OCP
triggers if the inductor curren t reaches or
exceeds th e current limit every cycle in t hose
50μs. The MP1493DS short-circuit protection
(SCP) occurs when dead shorts occur—when the
inductor current exceeds the curren t limit and th e
FB voltage is lower than 50% of the V REF—and
will trigger the OCP.
For MP149 3DS-A, ent ers hiccup mode, th at
periodically restarts the part when the inductor
current peak value exceeds the cu rrent limit and
VFB drops below the under-voltage (UV) threshold.
Typically, the UV threshold is 50 % below th e
REF voltag e. In OCP/ SCP, MP1 493DS-A will
disable the output vo ltage power, discharg e
internal soft -start cap, a nd then aut omatically try
to soft-start again. If the over-current circuit
condition still holds after soft-start ends, it
repeats this operation cycle until the over-current
circuit condition disapp ears, and output rise s
back to regulation level.
Over/Under-voltage Protection (OVP/UVP)
MP1493 monitors the output voltage through a
resistor d ivided feedba ck (FB) volt age to dete ct
over and un der voltage on the output. When the
FB voltage is higher than 125% of the REF
voltage, it’ll trigger OVP. Once it triggers OVP,
the LS-FET is always on, while the HS-FET is off.
It needs po wer cycle t o power up again. Wh en
MP1493 Rev. 1.15
www.MonolithicPower.com
12/9/2013
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
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