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PDF DS312 Data sheet ( Hoja de datos )
| Número de pieza | DS312 | |
| Descripción | Spartan-3E FPGA Family | |
| Fabricantes | Xilinx | |
| Logotipo |  |
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1
DS312 July 19, 2013
Module 1:
Introduction and Ordering Information
DS312 (v4.1) July 19, 2013
• Introduction
• Features
• Architectural Overview
• Package Marking
• Ordering Information
Module 2:
Functional Description
DS312 (v4.1) July 19, 2013
• Input/Output Blocks (IOBs)
• Overview
• SelectIO™ Signal Standards
• Configurable Logic Block (CLB)
• Block RAM
• Dedicated Multipliers
• Digital Clock Manager (DCM)
• Clock Network
• Configuration
• Powering Spartan®-3E FPGAs
• Production Stepping
Spartan-3E FPGA Family
Data Sheet
Product Specification
Module 3:
DC and Switching Characteristics
DS312 (v4.1) July 19, 2013
• DC Electrical Characteristics
• Absolute Maximum Ratings
• Supply Voltage Specifications
• Recommended Operating Conditions
• DC Characteristics
• Switching Characteristics
• I/O Timing
• SLICE Timing
• DCM Timing
• Block RAM Timing
• Multiplier Timing
• Configuration and JTAG Timing
Module 4:
Pinout Descriptions
DS312 (v4.1) July 19, 2013
• Pin Descriptions
• Package Overview
• Pinout Tables
• Footprint Diagrams
© Copyright 2005–2013 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, Artix, Kintex, Zynq, Vivado, and other designated brands included herein are trademarks of Xilinx
in the United States and other countries. PCI and PCI-X are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
DS312 July 19, 2013
Product Specification
www.xilinx.com
1
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1 page  
Spartan-3E FPGA Family: Introduction and Ordering Information
Package Marking
Figure 2 provides a top marking example for Spartan-3E
FPGAs in the quad-flat packages. Figure 3 shows the top
marking for Spartan-3E FPGAs in BGA packages except
the 132-ball chip-scale package (CP132 and CPG132). The
markings for the BGA packages are nearly identical to those
for the quad-flat packages, except that the marking is
rotated with respect to the ball A1 indicator. Figure 4 shows
the top marking for Spartan-3E FPGAs in the CP132 and
CPG132 packages.
X-Ref Target - Figure 2
On the QFP and BGA packages, the optional numerical
Stepping Code follows the Lot Code.
The “5C” and “4I” part combinations can have a dual mark
of “5C/4I”. Devices with a single mark are only guaranteed
for the marked speed grade and temperature range. All “5C”
and “4I” part combinations use the Stepping 1 production
silicon.
Mask Revision Code
Device Type
Package
Speed Grade
Temperature Range
R
SPARTAN R
XC3S250ETM
PQ208AGQ0525
D1234567A
4C
Fabrication Code
Process Technology
Date Code
Stepping Code (optional)
Lot Code
X-Ref Target - Figure 3
X-Ref Target - Figure 4
Pin P1
DS312-1_06_102905
Figure 2: Spartan-3E QFP Package Marking Example
BGA Ball A1
Device Type
Package
Speed Grade
Temperature Range
R
SPARTAN R
XC3S250ETM
FT256AGQ0525
D1234567A
4C
Mask Revision Code
Fabrication Code
Process Code
Date Code
Stepping Code (optional)
Lot Code
DS312-1_02_090105
Figure 3: Spartan-3E BGA Package Marking Example
Ball A1
3S250E
Device Type
Lot Code
F1234567-0525
Date Code
PHILIPPINES
Temperature Range
Package
C5 = CP132
C5AGQ 4C
C6 = CPG132
Speed Grade
Process Code
Mask Revision Code
Fabrication Code
DS312-1_05_032105
Figure 4: Spartan-3E CP132 and CPG132 Package Marking Example
DS312 (v4.1) July 19, 2013
Product Specification
www.xilinx.com
5
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5 Page 
X-Ref Target - Figure 5
T
T1
TCE
T2
O1
OTCLK1
OCE
O2
OTCLK2
I
IQ1
IDDRIN1
IDDRIN2
ICLK1
ICE
IQ2
ICLK2
SR
REV
Spartan-3E FPGA Family: Functional Description
TFF1
DQ
CE
CK
SR REV
DDR
MUX
DQ
TFF2
CE
CK
SR REV
Three-state Path
D
CE
CK
SR
OFF1
Q
REV
DDR
MUX
DQ
CE OFF2
CK
SR REV
Program-
mable
Output
Driver
Output Path
VCCO
Pull-Up
Pull-
Down
ESD
I/O
Pin
ESD
Keeper
Latch
Programmable
Delay
Programmable
Delay
DQ
CE IFF1
CK
SR REV
DQ
IFF2
CE
CK
SR REV
LVCMOS, LVTTL, PCI
Single-ended Standards
using VREF
Differential Standards
VREF
Pin
I/O Pin
from
Adjacent
IOB
Input Path
Figure 5: Simplified IOB Diagram
DS312-2_19_110606
DS312 (v4.1) July 19, 2013
Product Specification
www.xilinx.com
11
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11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet DS312.PDF ] | |
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