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PDF LTC3404 Data sheet ( Hoja de datos )
| Número de pieza | LTC3404 | |
| Descripción | 1.4MHz High Efficiency Monolithic Synchronous Step-Down Regulator | |
| Fabricantes | Linear | |
| Logotipo |  |
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FEATURES
■ High Efficiency: Up to 95%
■ Very Low Quiescent Current: Only 10μA
During Operation
■ 600mA Output Current at VIN = 3.3V
■ 2.65V to 6V Input Voltage Range
■ 1.4MHz Constant Frequency Operation
■ No Schottky Diode Required
■ Low Dropout Operation: 100% Duty Cycle
■ Synchronizable from 1MHz to 1.7MHz
■ Selectable Burst Mode® Operation or
Pulse Skipping Mode
■ 0.8V Reference Allows Low Output Voltages
■ Shutdown Mode Draws < 1μA Supply Current
■ ±2% Output Voltage Accuracy
■ Current Mode Control for Excellent Line and
Load Transient Response
■ Overcurrent and Overtemperature Protected
■ Available in 8-Lead MSOP Package
U
APPLICATIO S
■ Cellular Telephones
■ Wireless and DSL Modems
■ Personal Information Appliances
■ Portable Instruments
■ Distributed Power Systems
■ Battery-Powered Equipment
LTC3404
1.4MHz High Efficiency
Monolithic Synchronous
Step-Down Regulator
DESCRIPTIO
The LTC®3404 is a high efficiency monolithic synchro-
nous buck regulator using a constant frequency, current
mode architecture. Supply current during operation is
only 10μA and drops to < 1μA in shutdown. The 2.65V to
6V input voltage range makes the LTC3404 ideally suited
for single Li-Ion battery-powered applications. 100% duty
cycle provides low dropout operation, extending battery
life in portable systems.
Switching frequency is internally set at 1.4MHz, allowing
the use of small surface mount inductors and capacitors.
For noise sensitive applications the LTC3404 can be
externally synchronized from 1MHz to 1.7MHz. Burst
Mode operation is inhibited during synchronization or
when the SYNC/MODE pin is pulled low, preventing low
frequency ripple from interfering with audio circuitry.
The internal synchronous switch increases efficiency and
eliminates the need for an external Schottky diode. Low
output voltages are easily supported with the 0.8V feed-
back reference voltage. The LTC3404 is available in a
space saving 8-lead MSOP package.
For higher input voltage (11V abs max) applications, refer
to the LTC1877 data sheet.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
Burst Mode is a registered trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATIO
VIN
2.65V
TO 6V
High Efficiency Step-Down Converter
10μF***
CER
47pF
7
SYNC
5
SW
6
VIN
1 LTC3404
RUN
23
ITH GND VFB
4
4.7μH*
20pF
887k
280k
*TOKO D52LC A914BYW-4R7M
**TAIYO-YUDEN CERAMIC JMK325BJ226MM
***TAIYO-YUDEN CERAMIC LMK325BJ106MN
†VOUT CONNECTED TO VIN FOR 2.65V < VIN < 3.3V
VOUT†
3.3V
22μF**
CER
3404 TA01
Efficiency vs Output Load Current
100
95 VIN = 3.6V
90 VIN = 4.2V
VIN = 6V
85
80
75
70
0.1
Burst Mode OPERATION
VOUT = 3.3V
L = 4.7μH
1 10 100
LOAD (mA)
1000
3404 TA02
3404fb
1
Free Datasheet http://www.datasheet4u.com/
1 page  
TYPICAL PERFOR A CE CHARACTERISTICS
RDS(ON) vs Input Voltage
0.9
0.8
0.7
SYNCHRONOUS
SWITCH
0.6
0.5 MAIN
SWITCH
0.4
0.3
0.2
0.1
0
012345678
INPUT VOLTAGE (V)
3404 G09
DC Supply Current
vs Temperature
450
400
350
300
250
VIN = 3.6V
VOUT = 1.5V
200
PULSE SKIPPING
MODE
150
100
50
0
–50 –25
Burst Mode
OPERATION
0 25 50 75
TEMPERATURE (°C)
100 125
3404 G12
Burst Mode Operation
RDS(ON) vs Temperature
1.2
SYNCHRONOUS SWITCH
1.1 MAIN SWITCH
1.0
0.9
0.8 VIN = 3V
0.7 VIN = 5V
0.6
0.5
0.4
0.3
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
3404 G10
Switch Leakage vs Temperature
2.5
VIN = 7V
RUN = 0V
2.0
1.5
1.0 MAIN
SWITCH
SYNCHRONOUS
0.5 SWITCH
0
– 50 – 25
0 25 50 75
TEMPERATURE (°C)
100 125
3404 G13
Pulse Skipping Mode Operation
LTC3404
DC Supply Current
vs Input Voltage
500
VOUT = 1.8V
450
400 PULSE SKIPPING
350 MODE
300
250
200
150
100
50
0
2
Burst Mode
OPERATION
34 56
INPUT VOLTAGE (V)
78
3404 G11
Switch Leakage vs Input Voltage
1.2
RUN = 0V
1.0
SYNCHRONOUS
SWITCH
0.8
0.6
0.4
MAIN
SWITCH
0.2
0
0 1234 56 78
INPUT VOLTAGE (V)
3404 G20
Start-Up from Shutdown
SW
5V/DIV
VOUT
50mV/DIV
AC
COUPLED
IL
200mA/DIV
VIN = 4.2V
VOUT = 1.5V
L = 4.7μH
10μs/DIV
CIN = 10μF
COUT = 22μF
ILOAD = 30mA
SW
5V/DIV
VOUT
10mV/DIV
IL
100mA/DIV
3404 G14
VIN = 4.2V
VOUT = 1.5V
L = 4.7μH
500ns/DIV
CIN = 10μF
COUT = 22μF
ILOAD = 30mA
RUN
2V/DIV
VOUT
1V/DIV
IL
500mA/DIV
3404 G15
VIN = 3.6V
VOUT = 1.5V
L = 4.7μH
40μs/DIV
CIN = 10μF
COUT = 22μF
ILOAD = 500mA
3404 G16
3404fb
5
Free Datasheet http://www.datasheet4u.com/
5 Page 
LTC3404
APPLICATIO S I FOR ATIO
Phase-Locked Loop and Frequency Synchronization
The LTC3404 has an internal voltage-controlled oscillator
and phase detector comprising a phase-locked loop. This
allows the top MOSFET turn-on to be locked to the rising
edge of an external frequency source. The frequency range
of the voltage-controlled oscillator is 1MHz to 1.7MHz. The
phase detector used is an edge sensitive digital type that
provides zero degrees phase shift between the
external and internal oscillators. This type of phase detec-
tor will not lock up on input frequencies close to the har-
monics of the VCO center frequency. The PLL hold-in range
ΔfH is equal to the capture range, ΔfH = ΔfC = 300kHz and
– 400kHz.
The output of the phase detector is a pair of complemen-
tary current sources charging or discharging the external
filter network on the PLL LPF pin. The relationship
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VPPL LPF (V)
3404 • F04
Figure 4. Relationship Between Oscillator
Frequency and Voltage at PLL LPF Pin
PHASE
2.4V
DETECTOR
SYNC/
MODE
DIGITAL
PHASE/
FREQUENCY
DETECTOR
RLP
PLL LPF
VCO
CLP
3404 F05
Figure 5. Phase-Locked Loop Block Diagram
between the voltage on the PLL LPF pin and operating
frequency is shown in Figure 4. A simplified block diagram
is shown in Figure 5.
If the external frequency (VSYNC/MODE) is greater than
1.4MHz, the center frequency, current is sourced
continuously, pulling up the PLL LPF pin. When the
external frequency is less than 1.4MHz, current is sunk
continuously, pulling down the PLL LPF pin. If the
external and internal frequencies are the same but exhibit
a phase difference, the current sources turn on for an
amount of time corresponding to the phase difference.
Thus the voltage on the PLL LPF pin is adjusted until the
phase and frequency of the external and internal oscilla-
tors are identical. At this stable operating point the phase
comparator output is high impedance and the filter
capacitor CLP holds the voltage.
The loop filter components CLP and RLP smooth out the
current pulses from the phase detector and provide a
stable input to the voltage controlled oscillator. The filter
component’s CLP and RLP determine how fast the loop
acquires lock. Typically RLP = 10k and CLP is 2200pF to
0.01μF. When not synchronized to an external clock, the
internal connection to the VCO is disconnected. This
disallows setting the internal oscillator frequency by a DC
voltage on the VPLL LPF pin.
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses in LTC3404 circuits: VIN quiescent current and I2R
losses. The VIN quiescent current loss dominates the
efficiency loss at very low load currents whereas the I2R
loss dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve at
3404fb
11
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11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet LTC3404.PDF ] | |
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