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PDF TJA1083 Data sheet ( Hoja de datos )
| Número de pieza | TJA1083 | |
| Descripción | FlexRay node transceiver | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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TJA1083
FlexRay node transceiver
Rev. 1 — 10 October 2012
Product data sheet
1. General description
The TJA1083 FlexRay node transceiver is compliant with the FlexRay Electrical Physical
Layer specification V3.0.1 (see Ref. 1). In order to meet JASPAR the equirements, it
implements the ‘Increased voltage amplitude transmitter’ functional class. It is primarily
intended for communication systems operating at between 2.5 Mbit/s and 10 Mbit/s, and
provides an advanced interface between the protocol controller and the physical bus in a
FlexRay network. The TJA1083 offers an optimized solution for Electronic Control Unit
(ECU) applications that do not need enhanced power management and are typically
switched by the ignition or activated by a dedicated wake-up line.
The TJA1083 provides a differential transmit capability to the network and a differential
receive capability to the FlexRay controller. It offers excellent ElectroMagnetic
Compatibility (EMC) performance as well as high ElectroStatic Discharge (ESD)
protection.
The TJA1083 actively monitors system performance using dedicated error and status
information (readable by any microcontroller), as well as internal voltage and temperature
monitoring.
2. Features and benefits
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2.1 Optimized for time triggered communication systems
Compliant with Electrical Physical Layer specification V3.0.1
Meets JASPAR requirementsasdescribedinthe ‘Busdriverincreasedvoltage
amplitudetransmitter’functionalclass
Automotive product qualification in accordance with AEC-Q100
Data transfer rates from 2.5 Mbit/s to 10 Mbit/s
Supports 60 ns minimum bit time at 400 mV differential input voltage
Very low ElectroMagnetic Emission (EME) to support unshielded cable
Differential receiver with high common-mode range for excellent ElectroMagnetic
Immunity (EMI)
Auto I/O level adaptation to host controller supply voltage VIO
Can be used in 14 V, 24 V and 48 V powered systems
Instant transmitter shut-down interface (BGE pin)
2.2 Low-power management
Very low current consumption in Standby mode
Remote wake-up via a wake-up pattern or dedicated FlexRay data frames on the bus
lines
datasheet pdf - http://www.DataSheet4U.net/
1 page  
NXP Semiconductors
TJA1083
FlexRay node transceiver
Table 3. Pin signaling in the different power modes
Mode
Normal
Standby
STBN UV at UV
VIO at
VCC
HIGH no no
ERRN
LOW HIGH
error error
flag flag
set reset
LOW no
no wake wake
flag flag
set reset
LOW no
yes[3] wake wake
flag flag
set[4] reset[4]
RXD
LOW HIGH
SDO
Biasing UV-det Trans-
BP, BM
mitter
Low-
power
receiver
bus bus
high-
VCC / 2
DATA DATA_1 impedance
_0 or idle (in simple
wake wake
flag flag
set reset
wake wake
flag flag
set[4] reset[4]
error
indication
mode) or
enabled
(in SPI
mode)
GND
enabled enabled enabled[1]
disabled enabled[2]
disabled
HIGH no
yes[3] error error
flag flag
set reset
wake wake
flag flag
set[4] reset[4]
X yes[5] no LOW
X yes[5] yes[3] LOW
LOW
LOW
high-
impedance
enabled[2]
disabled
Power-off X
X[5] yes high-
impedance
HIGH
GND[6] disabled
disabled
[1] The wake flag is set if a valid wake-up event is detected while switching to Standby mode.
[2] The wake flag is set if a valid wake-up event is detected.
[3] Vuvd(VCC) > VCC > Vth(det)POR.
[4] Pins ERRN and RXD reflect the state of the wake flag prior to the VCC undervoltage event.
http://www.DataSheet4U.net/
[5] The internal signals at pins STBN, BGE and TXD are set LOW; the internal signals at pins TXEN, SCLK and SCSN are set HIGH.
[6] Except when VCC = 0; in this case BP and BM are floating.
6.1.1 Normal mode
In Normal mode, the transceiver transmits and receives data via the bus lines BP and BM.
The transmitter and the normal receiver are enabled, along with the undervoltage
detection function. The timing diagram for Normal mode is illustrated in Figure 3.
TJA1083
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 10 October 2012
© NXP B.V. 2012. All rights reserved.
5 of 41
datasheet pdf - http://www.DataSheet4U.net/
5 Page 
NXP Semiconductors
TJA1083
FlexRay node transceiver
6.3 Remote wake-up
6.3.1 Bus wake-up via wake-up pattern
A valid remote wake-up event occurs when a wake-up pattern is received. A wake-up
pattern consists of at least two consecutive wake-up symbols. A wake-up symbol
comprises a DATA_0 phase lasting longer than tdet(wake)DATA_0 followed by an idle phase
lasting longer than tdet(wake)idle, provided both wake-up symbols occur within a time span
of tdet(wake)tot (see Figure 8). The transceiver also wakes up if DATA_1 phases are
substituted for the idle phases.
Vdif
(mV)
0
-500
< tdet(wake)tot
> tdet(wake)idle
wake-up
> tdet(wake)idle
> tdet(wake)DATA_0
> tdet(wake)DATA_0
+500
0
-500
> tdet(wake)idle
> tdet(wake)idle
> tdet(wake)DATA_0http://www.DataSheet4U.net/
> tdet(wake)DATA_0
Fig 8. Bus wake-up timing
wake-up symbol
wake-up symbol
wake-up pattern
015aaa007
See Ref. 1 for more details of the wake-up mechanism.
6.3.2 Bus wake-up via dedicated FlexRay data frame
The TJA1083 wake flag is set when a dedicated data frame emulating a valid wake-up
pattern, as shown in Figure 9, is received.
The DATA_0 and DATA_1 phases of the emulated wake-up symbol are interrupted by the
Byte Start Sequence (BSS) preceding each byte in the data frame. With a data rate of
10 Mbit/s, the interruption has a maximum duration of 130 ns and does not prevent the
transceiver from recognizing the wake-up pattern in the payload.
For longer interruptions at lower data rates (5 Mbit/s and 2.5 Mbit/s), the wake-up pattern
should be used (see Section 6.3.1).
The wake flag is not set if an invalid wake-up pattern is received. See Ref. 1 for more
details on invalid wake-up patterns.
TJA1083
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 10 October 2012
© NXP B.V. 2012. All rights reserved.
11 of 41
datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
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