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PDF FM24C04C Data sheet ( Hoja de datos )
| Número de pieza | FM24C04C | |
| Descripción | 4Kb Serial 5V F-RAM Memory | |
| Fabricantes | Ramtron | |
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Preliminary
FM24C04C
4Kb Serial 5V F-RAM Memory
Features
4K bit Ferroelectric Nonvolatile RAM
Organized as 512 x 8 bits
High Endurance 1012 Read/Writes
36 Year Data Retention at +75C
NoDelay™ Writes
Advanced High-Reliability Ferroelectric Process
Fast Two-wire Serial Interface
Up to 1 MHz maximum bus frequency
Direct hardware replacement for EEPROM
Supports legacy timing for 100 kHz & 400 kHz
Low Power Operation
5V operation
100 A Active Current (100 kHz)
4 A (typ.) Standby Current
Industry Standard Configuration
Industrial Temperature -40 C to +85 C
8-pin “Green”/RoHS SOIC (-G)
Description
The FM24C04C is a 4-kilobit nonvolatile memory
employing an advanced ferroelectric process. A
ferroelectric random access memory or FRAM is
nonvolatile and performs reads and writes like a
RAM. It provides reliable data retention for 36 years
while eliminating the complexities, overhead, and
system level reliability problems caused by EEPROM
and other nonvolatile memories.
The FM24C04C performs write operations at bus
speed. No write delays are incurred. Data is written to
the memory array in the cycle after it has been
successfully transferred to the device. The next bus
cycle may commence immediately without the need
for data polling. The FM24C04C is capable of
supporting 1012 read/write cycles, or a million times
more write cycles than EEPROM.
These capabilities make the FM24C04C ideal for
nonvolatile memory applications requiring frequent
or rapid writes. Examples range from data collection
where the number of write cycles may be critical, to
demanding industrial controls where the long write
time of EEPROM can cause data loss. The
combination of features allows more frequent data
writing with less overhead for the system.
The FM24C04C provides substantial benefits to users
of serial EEPROM, yet these benefits are available in
a hardware drop-in replacement. The FM24C04C is
available in an industry standard 8-pin SOIC package
and uses a familiar two-wire protocol. The
specifications are guaranteed over the industrial
temperature range from -40°C to +85°C.
Pin Configuration
NC
A1
A2
VSS
1
2
3
4
8 VDD
7 WP
6 SCL
5 SDA
Pin Names
A1-A2
SDA
SCL
WP
VSS
VDD
Function
Device Select Address 1 and 2
Serial Data/Address
Serial Clock
Write Protect
Ground
Supply Voltage
Ordering Information
FM24C04C-G
“Green”/RoHS 8-pin SOIC
FM24C04C-GTR “Green”/RoHS 8-pin SOIC,
Tape & Reel
This is a product that has fixed target specifications but are subject
to change pending characterization results.
Rev. 1.1
June 2011
Ramtron International Corporation
1850 Ramtron Drive, Colorado Springs, CO 80921
(800) 545-FRAM, (719) 481-7000
www.ramtron.com
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FM24C04C
Figure 4. Slave Address
No word address occurs for a read operation. Reads
always use the lower 8-bits that are held internally in
the address latch and the 9th address bit is part of the
slave address. Reads always begin at the address
following the previous access. A random read address
can be loaded by doing a write operation as explained
below.
After transmission of each data byte, just prior to the
acknowledge, the FM24C04C increments the internal
address latch. This allows the next sequential byte to
be accessed with no additional addressing. After the
last address (1FFh) is reached, the address latch will
roll over to 000h. There is no limit to the number of
bytes that can be accessed with a single read or write
operation.
Data Transfer
After all address information has been transmitted,
data transfer between the bus master and the
FM24C04C can begin. For a read operation the
FM24C04C will place 8 data bits on the bus then wait
for an acknowledge. If the acknowledge occurs, the
next sequential byte will be transferred. If the
acknowledge is not sent, the read operation is
concluded. For a write operation, the FM24C04C will
accept 8 data bits from the master then send an
acknowledge. All data transfer occurs MSB (most
significant bit) first.
Memory Operation
The FM24C04C is designed to operate in a manner
very similar to other 2-wire interface memory
products. The major differences result from the
higher performance write capability of FRAM
technology. These improvements result in some
differences between the FM24C04C and a similar
configuration EEPROM during writes. The complete
operation for both writes and reads is explained
below.
Write Operation
All writes begin with a slave address then a word
address. The bus master indicates a write operation
by setting the LSB of the Slave address to a 0. After
addressing, the bus master sends each byte of data to
the memory and the memory generates an
acknowledge condition. Any number of sequential
bytes may be written. If the end of the address range
is reached internally, the address counter will wrap
from 1FFh to 000h.
Unlike other nonvolatile memory technologies, there
is no write delay with FRAM. The entire memory
cycle occurs in less time than a single bus clock.
Therefore any operation including read or write can
occur immediately following a write. Acknowledge
polling, a technique used with EEPROMs to
determine if a write is complete is unnecessary and
will always return a done condition.
An actual memory array write occurs after the 8th
data bit is transferred. It will be complete before the
acknowledge is sent. Therefore if the user desires to
abort a write without altering the memory contents,
this should be done using a start or stop condition
prior to the 8th data bit. The FM24C04C needs no
page buffering.
Pulling write protect high will disable writes to the
entire array. The FM24C04C will not acknowledge
data bytes that are written when write protect is
asserted. In addition, the address counter will not
increment if writes are attempted. Pulling WP low
(VSS) will deactivate this feature.
Figures 5 and 6 below illustrate both a single-byte
and multiple- byte write cases.
Rev. 1.1
June 2011
Page 5 of 12
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5 Page 
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Mechanical Drawing
8-pin SOIC (JEDEC Standard MS-012 variation AA)
FM24C04C
Recommended PCB Footprint
Pin 1
4.90 ±0.10
3.90 ±0.10 6.00 ±0.20
1.35
1.75
2.00
1.27
0.25
0.50
7.70
3.70
0.65
0.19
45 0.25
1.27 0.10
0.33 0.25
0.51
0.10 mm
0-8
0.40
1.27
Refer to JEDEC MS-012 for complete dimensions and notes.
All dimensions in millimeters.
SOIC Package Marking Scheme
XXXXXXX-P
RLLLLLLL
RICYYWW
Legend:
XXXXXX= part number, P= package type
R=rev code, LLLLLLL= lot code
RIC=Ramtron Int’l Corp, YY=year, WW=work week
Example: FM24C04C, “Green”/RoHS SOIC package, Year 2010, Work Week 49
FM24C04C-G
A00002G1
RIC1049
Rev. 1.1
June 2011
Page 11 of 12
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| PDF Descargar | [ Datasheet FM24C04C.PDF ] | |
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