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PDF PN544 Data sheet ( Hoja de datos )
| Número de pieza | PN544 | |
| Descripción | Near field communication (NFC) controller | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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PN544
Near field communication (NFC) controller
Rev. 1.2 — 4 September 2007
134812
Objective short data sheet
1. Introduction
This Objective short data sheet describes the functionality of the controller IC PN544. It
includes functional and electrical specifications. A complete specification will be given in
the product data sheet.
2. General description
The PN544 is a highly integrated NFC controller IC for contactless communication at
13.56 MHz. This controller IC utilizes an outstanding modulation and demodulation
concept for different kinds of contactless communication methods and protocols at
13.56 MHz.
The PN544 supports active mode for NFC-IP1 transmission modes. Passive mode is also
supported where PN544 can act either as contactless reader or emulate an contactless
card.
When configured in card emulation mode, PN544 supports both integrated Mifare Classic
solution (optional) and all card modes supported by both PN544 and present phone SIM
or separate secure element. Supported modes are pictured on this page.
Active
communication
mode
NFC-IP1 Initiator(1)
NFC-IP1 Target(1)
PCD in passive
communication
mode
NFC-IP1 Initiator(1)
ISO 14443 Type A
ISO 14443 Type B
Sony Felica (1)
ISO 15693
Mifare Classic
ICODE
(1) According to ISO/IEC 18092 (ECMA 340) standard (see Ref. 1)
Fig 1. PN544 transmission modes
PICC in passive
communication
mode
NFC-IP1 Target(1)
ISO 14443 Type A
ISO 14443 Type B
Sony Felica (1)
Type B’
Mifare Classic
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NXP Semiconductors
6. Block diagram
PN544
Near field communication (NFC) controller
NSS/SCL/TX/TX
SCK/SDA/HD/HD
MISO/ADR0/NC/CLK
MOSI/ADR1/RX/RX
SPI / I2C / RS232 / sync.RS232
Host Interfaces
I2C FSM
I2C
RS232
SPI
Co-Processors
CRC
Collider
Triggered Copy
Machines
TCM 0
TCM 1
TCM 2
TCM 3
TCM 4
Timer 0 & 1
Interrupt
Controller
other Peripheral Modules
ROM
72kByte
Code / Data Memories
RAM
4kByte
EEPROM
8kByte (Data)
EEPROM
36kByte (Code)
PN544
Memory Interface
µP
MMU / MPU
CPU
HT80C51MX
HT-SFR Bus
Clock &
Reset
Logic
Boundary
Scan
TAP
Controller
async. SFR
Interface
RNG
GPIO
TXCodec RXDecod
NFC-WI
SigPro
C’less Co-Processor
VMID
RF
Detect
ADC
Demod
BG
Sensor
TxCtrl
Driver
TCK
TDI
TMS
TDO
VBAT
VEN
VRF
PVDD
DVDD
AVDD
TVDD
LDO1V8
DCDC1V8
DCDC1
DCDC2
XTAL1
XTAL2
AUX1
AUX2
AUX3
AUX4
Fig 2. Block diagram of PN544
134812
Objective short data sheet
Rev. 1.2 — 4 September 2007
© NXP B.V. 2007. All rights reserved.
5 of 34
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NXP Semiconductors
PN544
Near field communication (NFC) controller
8.1.2 FeliCa PCD mode
The FeliCa mode is the general reader/writer to card communication scheme according to
the FeliCa specification. The following diagram describes the communication on a
physical level, the communication overview describes the physical parameters.
PN544
ISO/IEC 18092 Felica
PCD mode
PCD to PICC 8..30 % ASK
Manchester coded
212..424 kbit
PICC to PCD, >12% ASK Loadmodulation
Manchester coded
212..424 kbit
Card (PICC)
Felica
Fig 5. FeliCa reader/writer Communication Diagram
Table 5. Communication overview for FeliCa reader/writer
Communication
direction
FeliCa
Transfer speed
212 kbit/s
PN544 → card Modulation on reader side
8-30% ASK
bit coding
Manchester Coding
Bitlength
(64/13.56) μs
card → PN544 Loadmodulation on card side >12% ASK
bit coding
Manchester coding
FeliCa Higher
transfer speeds
424 kbit/s
8-30% ASK
Manchester Coding
(32/13.56) μs
>12% ASK
Manchester coding
The contactless UART of PN544 and the on-chip CPU handle the FeliCa protocol.
Nevertheless a dedicated external host has to handle the application layer
communication.
134812
Objective short data sheet
Rev. 1.2 — 4 September 2007
© NXP B.V. 2007. All rights reserved.
11 of 34
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| Páginas | Total 34 Páginas | |
| PDF Descargar | [ Datasheet PN544.PDF ] | |
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