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PDF PI90LV03 Data sheet ( Hoja de datos )

Número de pieza PI90LV03
Descripción SOTiny LVDS Repeater
Fabricantes Pericom Semiconductor 
Logotipo Pericom Semiconductor Logotipo



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No Preview Available ! PI90LV03 Hoja de datos, Descripción, Manual

PI90LV03/PI90LVB03
SOTinyLVDS Repeater
Features
• Complies with ANSI/TIA/EIA-644-A LVDS standard
• LVDS receiver inputs accept LVPECL signals
• Low jitter 660 Mbps fully differential data path
• Bus-Terminal ESD exceeds 2kV
• Single +3.3V supply voltage operation
• Receiver Differential Input Voltage Threshold < ±100mV
• Receiver open-circuit failsafe
• Low-Voltage Differential Signaling with typical Output Volt-
ages of 350mV into:
– 100Ω Load (PI90LV03)
– 50Ω Load (PI90LVB03)
• Typical Propagation Delay Times of 1.5ns
• Typical Power Dissipation of 20mW @ 200 MHz
• Outputs are High Impedance with VCC < 1.5V
• Industrial Temperature Range: –40°C to 85°C
• Packaging:
- 6-pin space-saving SOT-23 (T)
Function Table
Inputs
Outputs
VID = VA - VB
VY - VZ
VID > 50mV
50mV < VID < 50mV
VID ≤ -50mV
H
X
L
Open
H
Notes:www.DataSheet4U.net
1. H = high level; L = low level; X = indeterminate
Block Diagram
A1
B2
5Y
4Z
Pin Configuration
A 1 6 VDD
B2 5 Y
GND 3 4 Z
Description
PI90LV03 and PI90LVB03 are single LVDS Repeaters that use
low-voltage differential signaling (LVDS) to support data rates up
to 660 Mbps. The PI90LVB03 features high-drive output. Both
products are designed for applications requiring high-speed, low-
power consumption, low-noise generation, and a small package.
The LVDS Repeaters take an LVDS input signal and provide an
LVDS output to address various interface logic requirements such
as signal isolation, repeater, stub length, and Optical Transceiver
Modules. In many large systems, signals are distributed across
backplanes, and the distance between the transmission line and the
unterminated receivers are one of the limiting factors for system
speed. The buffers can be used to reduce the ‘stub length’ by stra-
tegic device placement along the trace length. They can improve
system performance by allowing the receiver to be placed very
close to the main transmission line or very close to the connector
on the card. Longer traces to the LVDS receiver can then be placed
after the buffer.
The buffer’s wide input dynamic range enables them to receive dif-
ferential signals from LVPECL and LVDS sources. The devices can
be used as compact high-speed serial translators between LVPECL
and LVDS data lines. The differential translation provides a simple
way to mix and match Optical Transceiver ICs from various vendors
without redesigning the interfaces.
Applications
The PI90LV03 and PI90LVB03 provide differential translation
between LVDS and PECL devices for high-speed, point-to-point
interface and telecom applications:
– ATM
– SONET/SDH
– Switches
– Routers
– Add-Drop Multiplexers
High-Speed Differential Cable Repeater Application
RT = ZO
TX
ZO
LVDS Repeater
Any LVDS RX
RT = ZO
ZO
1
PS8660A
07/07/04

1 page




PI90LV03 pdf
PI90LV03/PI90LVB03
SOTinyLVDS Repeaters
Receiver Switching Characteristics over Recommended Operating Conditions (unless otherwise noted)
Symbol
Parameter
Test Conditions
Min.
Typ. Max. Units
tPLH
tPHL
tR
tF
tsk(p)
tskpp
fmax
Propagation delay, low to high level outputs
Propagation delay, high to low level outputs
Output signal rise time
Output signal fall time
Pulse skew ( | tPHL - tPLH | )(2)
Part-to-part skew
Maximum throughtput data rate(3)
LV03 RL = 100Ω,
LVB03 RL = 50Ω;
CL = 10pF
See Figure 6
1.4 6
1.4 6
0.5 1
ns
0.5 1
50 ps
1.5 ns
660 mbps
Notes:
1. All typical values are at 25°C and with a 3.3V supply
2. tsk(p) is the magnitude of the time difference between the high-to-low and low-to-high propagation delay times at an output.
3. fmax generator input conditions: 50% duty cycle, 200mV, Output criteteria: 45% to 55% duty cycle, VOD ≥ 250mV
Parameter Measurement Information
VIA + VIB
2
A
VID
VIA
VIC
VIB
B
DY IOY
IOZ VOD
VOY= VOZ
2
DZ VOY
VOZ
VOC
Figure 4. Voltage Definitions
Table 1. Receiver Minimum and Maximum Input Threshold Test Voltages
www.DataSheet4U.net
Applied Voltages (V) Resulting Differenital Input Votlages (mV) Resulting Common-Mode Input Voltages (V)
VIA VIB
VID
VIC
1.25 1.20
50
1.2
1.15 1.20
-50
1.2
2.4 2.35
50
2.35
2.3 2.35
-50
2.35
0.05 0
50
0.05
0 0.05
-50
0.05
1.5 0.9
600
1.2
0.9 1.5
-600
1.2
2.4 1.8
600
2.1
1.8 2.4
-600
2.1
0.6 0
600
0.3
0 0.6
-600
0.3
5
PS8660B
09/07/04

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