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PDF PIC18F8628 Data sheet ( Hoja de datos )
| Número de pieza | PIC18F8628 | |
| Descripción | Enhanced Flash Microcontrollers | |
| Fabricantes | Microchip Technology | |
| Logotipo |  |
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PIC18F8723 Family
Data Sheet
64/80-Pin, 1-Mbit,
Enhanced Flash Microcontrollers
with 12-Bit A/D and nanoWatt Technology
© 2007 Microchip Technology Inc.
www.DataSheet.in
Preliminary
DS39894A
1 page  
Pin Diagrams (Continued)
80-Pin TQFP
PIC18F8723
RH2/A18
RH3/A19
RE1/AD9/WR/P2C
RE0/AD8/RD/P2D
RG0/ECCP3/P3A
RG1/TX2/CK2
RG2/RX2/DT2
RG3/CCP4/P3D
RG5/MCLR/VPP
RG4/CCP5/P1D
VSS
VDD
RF7/SS1
RF6/AN11
RF5/AN10/CVREF
RF4/AN9
RF3/AN8
RF2/AN7/C1OUT
RH7/AN15/P1B(2)
RH6/AN14/P1C(2)
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
1 60
2 59
3 58
4 57
5 56
6 55
7 54
8 53
9
10
PIC18F8628
52
51
11 PIC18F8723 50
12 49
13 48
14 47
15 46
16 45
17 44
18 43
19 42
20 41
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
RJ2/WRL
RJ3/WRH
RB0/INT0
RB1/INT1
RB2/INT2
RB3/INT3/ECCP2(1)/P2A(1)
RB4/KBI0
RB5/KBI1/PGM
RB6/KBI2/PGC
VSS
OSC2/CLKO/RA6
OSC1/CLKI/RA7
VDD
RB7/KBI3/PGD
RC5/SDO1
RC4/SDI1/SDA1
RC3/SCK1/SCL1
RC2/ECCP1/P1A
RJ7/UB
RJ6/LB
Note 1: The ECCP2/P2A pin placement is determined by the CCP2MX Configuration bit and Processor mode settings.
2: P1B, P1C, P3B and P3C pin placement is determined by the ECCPMX Configuration bit.
© 2007 Microchip Technology Inc.
www.DataSheet.in
Preliminary
DS39894A-page 3
5 Page 
PIC18F8723 FAMILY
FIGURE 1-1:
PIC18F6628/6723 (64-PIN) BLOCK DIAGRAM
Table Pointer<21>
inc/dec logic
21
20
Address Latch
Program Memory
(48/64/96/128
Kbytes)
Data Latch
8
Data Bus<8>
88
PCLATU PCLATH
PCU PCH PCL
Program Counter
31 Level Stack
STKPTR
Table Latch
Data Latch
Data Memory
(3.9 Kbytes)
Address Latch
12
Data Address<12>
4
BSR
12
FSR0
FSR1
FSR2
4
Access
Bank
12
inc/dec
logic
ROM Latch
Instruction Bus <16>
IR
Address
Decode
OSC1(3)
OSC2(3)
T1OSI
T1OSO
MCLR(2)
VDD, VSS
Instruction
Decode and
Control
State Machine
Control Signals
8
PRODH PRODL
Internal
Oscillator
Block
INTRC
Oscillator
8 MHz
Oscillator
Single-Supply
Programming
In-Circuit
Debugger
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
Fail-Safe
Clock Monitor
3
BITOP
8
8 x 8 Multiply
8
W
88
8
ALU<8>
Precision
Band Gap
Reference
8
8
BOR
HLVD
ADC
12-Bit
Timer0
Timer1
Timer2
Timer3
Timer4 Comparators
PORTA
RA0:RA7(1)
PORTB
RB0:RB7(1)
PORTC
RC0:RC7(1)
PORTD
RD0:RD7(1)
PORTE
RE0:RE7(1)
PORTF
RF0:RF7(1)
PORTG
RG0:RG5(1,2)
ECCP1
ECCP2 ECCP3
CCP4
CCP5 EUSART1 EUSART2 MSSP1 MSSP2
Note 1: See Table 1-2 for I/O port pin descriptions.
2: RG5 is only available when MCLR functionality is disabled.
3: OSC1/CLKI and OSC2/CLKO are only available in select oscillator modes and when these pins are not being used as
digital I/O. For additional information, refer to Section 2.0 “Oscillator Configurations” of the “PIC18F8722 Family
Data Sheet” (DS39646).
© 2007 Microchip Technology Inc.
www.DataSheet.in
Preliminary
DS39894A-page 9
11 Page | ||
| Páginas | Total 60 Páginas | |
| PDF Descargar | [ Datasheet PIC18F8628.PDF ] | |
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