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PDF ISL97673 Data sheet ( Hoja de datos )
| Número de pieza | ISL97673 | |
| Descripción | 6-Channel SMBus or PWM Dimming LED Driver | |
| Fabricantes | Intersil | |
| Logotipo |  |
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6-Channel SMBus or PWM Dimming LED Driver
with Phase Shift Control
ISL97673
The ISL97673 is a 6-Channel 45V dual dimming capable
LED driver that can be used with either SMBus/I2C or
PWM signal for dimming control. The ISL97673 drives 6
channels of LED to support 78 LEDs from 4.5V to 26V or
48 LEDs from a boost supply of 2.7V to 26V and a
separate 5V bias on the ISL97673 VIN pin
The ISL97673 compensates for non-uniformity of the
forward voltage drops in the LED strings with its 6 voltage
controlled-current source channels. Its headroom control
monitors the highest LED forward voltage string for output
regulation, to minimize the voltage headroom and power
loss in a typical multi-string operation.
The ISL97673 features optional channel phase shift
control to minimize the input, output ripple
characteristics and load transients as well as spreading
the light output to help reduce the video and audio
interference from the backlight driver operation. The
phase shift can be programmed with equal phase angle
or adjustable in 7-bit resolution.
The ISL97673 has a full range of dimming capabilities
that include SMBus/I2C controlled PWM dimming or DC
dimming. Another key feature of the ISL97673 is that it
allows very linear PWM dimming from 0.4% to 100% of
up to 30kHz. Current matching of 0.4% to 100%
dimming achieves ±1% tolerance from 100Hz to 5kHz
dimming and ±3% tolerance from 5kHz to 30kHz
dimming.
Features
• 6 Channels
• 4.5V to 26.5V Input
• 45V Output Max
• Up to 40mA LED Current per channel
• Extensive Dimming Control
- PWM/DPST Dimming, I2C 8-bit with equal phase
shift, and 0.007% Direct PWM dimming at 200Hz
• Optional Master Fault Protection
• PWM Dimming Linearity 0.4%~100% <30kHz
• 600kHz/1.2MHz selectable switching frequency
• Dynamic Headroom Control
• Protections with Flag Indication
- String Open/Short Circuit, VOUT Short Circuit,
Overvoltage and Over-Temperature Protections
- Optional Master Fault Protection
• Current Matching ±0.7%
• 20 Ld 4mmx3mm QFN Package
Applications*(see page 26)
• Notebook Displays WLED or RGB LED Backlighting
• LCD Monitor LED Backlighting
• Automotive Displays LED Backlighting
Typical Application Circuit
VIN = 4.5~26.5V
VOUT = 45V*, 40mA PER CHANNEL
June 24, 2010
FN7633.0
ISL97673
1 FAULT
2 VIN
4 VDC
LX 20
OVP 16
18 COMP
PGND 19
7 SMBCLK(SCL)/SEL2
6 SMBDAT(SDA)/ CH0 10
_FLAG
CH1 11
3 EN/PWM
CH2 12
17 RSET
CH3 13
8 FPWM
CH4 14
5 SEL1
CH5 15
AGND 9
*VIN > 12V
FIGURE 1. ISL97673 TYPICAL APPLICATION DIAGRAM
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL97673
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Absolute Maximum Ratings (TA = +25°C)
VIN, EN/PWM. . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 28V
FAULT . . . . . . . . . . . . . . . . . . . . . VIN - 8.5V to VIN + 0.3V
VDC, COMP, RSET, FPWM, OVP . . . . . . . . . . . . -0.3V to 5.5V
SMBCLK(SCL), SMBDAT(SDA) . . . . . . . . . . . . -0.3V to 5.5V
CH0 - CH5, LX . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 45V
PGND, AGND . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
Above voltage ratings are all with respect to AGND pin
ESD Rating
Human Body Model (Tested per JESD22-A114E) . . . . . 3kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . 300V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . 1kV
Thermal Information
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
20 Ld QFN Package (Notes 4, 5, 7) .
40
2.5
Thermal Characterization (Typical)
PSIJT (°C/W)
20 Ld QFN Package (Note 6) . . . . . . . . . . . . 1
Maximum Continuous Junction Temperature . . . . . . +125°C
Storage Temperature . . . . . . . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . -40°C to +85°C
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless
otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTES:
4. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach”
features. See Tech Brief TB379.
5. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
6. PSIJT is the PSI junction-to-top thermal characterization parameter. If the package top temperature can be measured with this
rating then the die junction temperature can be estimated more accurately than the θJC and θJC thermal resistance ratings
7. Refer to JESD51-7 high effective thermal conductivity board layout for proper via and plane designs.
Electrical Specifications
All specifications below are tested at TA = +25°C; VIN = 12V, EN/PWM = 5V, RSET = 20.1kΩ,
unless otherwise noted. Boldface limits apply over the operating temperature range,
-40°C to +85°C.
PARAMETER
DESCRIPTION
CONDITION
MIN
MAX
(Note 8) TYP (Note 8) UNIT
GENERAL
VIN (Note 9) Backlight Supply Voltage
≤11 LEDs per channel
(3.2V/20mA type)
4.5
26.5
V
IVIN_STBY
VOUT
VIN Shutdown Current
Output Voltage
VUVLO
VUVLO_HYS
REGULATOR
Undervoltage Lock-out Threshold
Undervoltage Lock-out Hysteresis
4.5V < VIN ≤ 26V,
FSW = 600kHz
8.55V < VIN ≤ 26V,
FSW = 1.2MHz
4.5V < VIN ≤ 8.55V,
FSW = 1.2MHz
10 µA
45 V
45 V
VIN/0.19 V
2.6 3.3 V
275 mV
VDC
IVDC_STBY
IVDC
VLDO
ENLow
ENHi
tENLow
LDO Output Voltage
Standby Current
Active Current
VDC LDO Droop Voltage
Guaranteed Range for EN Input Low Voltage
Guaranteed Range for EN Input High Voltage
EN/PWMI Low Time Before Shut-down
VIN > 6V
EN/PWMI = 0V
EN/PWMI = 5V
VIN > 5.5V, 20mA
4.55
4.8
5
20
1.8
30.5
5
5
200
0.5
V
µA
mA
mV
V
V
ms
5 FN7633.0
June 24, 2010
5 Page 
ISL97673
www.DataSheet4U.com
Theory of Operation
PWM Boost Converter
The current mode PWM boost converter produces the
minimal voltage needed to enable the LED stack with the
highest forward voltage drop to run at the programmed
current. The ISL97673 employs current mode control
boost architecture that has a fast current sense loop and
a slow voltage feedback loop. Such architecture achieves
a fast transient response that is essential for the
notebook backlight application where the power can be a
series of drained batteries or instantly change to an
AC/DC adapter without rendering a noticeable visual
nuisance. The number of LEDs that can be driven by
ISL97673 depend on the type of LED chosen in the
application. The ISL97673 are capable of boosting up to
45V and typically driving 13 LEDs in series for each of the
6 channels, enabling a total of 104 pieces of the
3.2V/20mA type of LEDs.
The LED peak current is set by translating the RSET
current to the output with a scaling factor of 401.8/RSET.
The source terminals of the current source MOSFETs are
designed to run at 500mV to optimize power loss versus
accuracy requirements. The sources of errors of the
channel-to-channel current matching come from the
op amps offset, internal layout, reference, and current
source resistors. These parameters are optimized for
current matching and absolute current accuracy.
However, the absolute accuracy is additionally
determined by the external RSET. A 1% tolerance resistor
is recommended.
Enable and PWM
The ISL97673 has EN/PWM pin that serves dual
purposes; it is used as an Enable signal and can be used
as a PWM input signal for dimming. If a PWM signal is
applied to this pin, the first pulse of minimum 4ms will be
used as an Enable signal. If there is no signal for longer
than 28ms, the device will enter shutdown.
OVP and VOUT Requirement
The Overvoltage Protection (OVP) pin has a function of
setting the overvoltage trip level as well as limiting the
VOUT regulation range.
The ISL97673 OVP threshold is set by RUPPER and
RLOWER as shown in Equation 1:
VOUT_OVP = 1.21V × (RUPPER + RLOWER) ⁄ RLOWER (EQ. 1)
VOUT can only regulate between 64% and 100% of the
VOUT_OVP such that:
Allowable VOUT = 64% to 100% of VOUT_OVP
For example, if 10 LEDs are used with the worst case
VOUT of 35V. If R1 and R2 are chosen such that the OVP
level is set at 40V, then the VOUT is allowed to operate
between 25.6V and 40V. If the requirement is changed to
a 6 LEDs 21V VOUT application, then the OVP level must
be reduced and users should follow VOUT = (64%
~100%) OVP requirement. Otherwise, the headroom
control will be disturbed such that the channel voltage
can be much higher than expected and sometimes it can
prevent the driver from operating properly.
The ratio of the OVP capacitors should be the inverse of
the OVP resistors. For example, if RUPPER/RLOWER = 33/1,
then CUPPER/CLOWER = 1/33 with CUPPER = 100pF and
CLOWER = 3.3nF.
Current Matching and Current Accuracy
Each channel of the LED current is regulated by the
current source circuit, as shown in Figure 19.
+- REF
RSET
+
-
PWM DIMMING
DC DIMMING
+
-
FIGURE 19. SIMPLIFIED CURRENT SOURCE CIRCUIT
Dynamic Headroom Control
The ISL97673 features a proprietary Dynamic Headroom
Control circuit that detects the highest forward voltage
string or effectively the lowest voltage from any of the
CH0-CH5 pins digitally. When the lowest channel voltage
is lower than the short circuit threshold, VSC, such
voltage will be used as the feedback signal for the boost
regulator. The boost makes the output to the correct
level such that the lowest channel is at the target
headroom voltage. Since all LED stacks are connected to
the same output voltage, the other channel pins will have
a higher voltage, but the regulated current source circuit
on each channel will ensure that each channel has the
same current. The output voltage will regulate cycle-by-
cycle and it is always referenced to the highest forward
voltage string in the architecture.
Operating Modes
The ISL97673 has extensive operating modes such as
SMBus controlled PWM or DC dimmings, PWM dimming
with phase shift control and more. Depending on the pin
5 (SEL1) condition, pins 6 and 7 correspond to different
operating modes as shown in Table 1.
11 FN7633.0
June 24, 2010
11 Page | ||
| Páginas | Total 27 Páginas | |
| PDF Descargar | [ Datasheet ISL97673.PDF ] | |
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