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PDF LTC3418 Data sheet ( Hoja de datos )

Número de pieza LTC3418
Descripción 8A/ 4MHz/ Monolithic Synchronous Step-Down Regulator
Fabricantes Linear Technology 
Logotipo Linear Technology Logotipo



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FEATURES
High Efficiency: Up to 95%
8A Output Current
2.25V to 5.5V Input Voltage Range
Low RDS(ON) Internal Switch: 35m
Tracking Input to Provide Easy Supply Sequencing
Programmable Frequency: 300kHz to 4MHz
0.8V ±1% Reference Allows Low Output Voltage
Quiescent Current: 380µA
Selectable Forced Continuous/Burst Mode® Operation
with Adjustable Burst Clamp
Synchronizable Switching Frequency
Low Dropout Operation: 100% Duty Cycle
Power Good Output Voltage Monitor
Overtemperature Protected
38-Lead Low Profile (0.75mm) Thermally Enhanced
QFN (5mm × 7mm) Package
U
APPLICATIO S
Microprocessor, DSP and Memory Supplies
Distributed 2.5V, 3.3V and 5V Power Systems
Automotive Applications
Point of Load Regulation
Notebook Computers
LTC3418www.DataSheet4U.com
8A, 4MHz, Monolithic
Synchronous Step-Down
Regulator
DESCRIPTIO
The LTC®3418 is a high efficiency, monolithic synchro-
nous step-down DC/DC converter utilizing a constant
frequency, current mode architecture. It operates from an
input voltage range of 2.25V to 5.5V and provides a
regulated output voltage from 0.8V to 5V while delivering
up to 8A of output current. The internal synchronous
power switch increases efficiency and eliminates the need
for an external Schottky diode. Switching frequency is set
by an external resistor or can be synchronized to an
external clock. OPTI-LOOP® compensation allows the
transient response to be optimized over a wide range of
loads and output capacitors.
The LTC3418 can be configured for either Burst Mode
operation or forced continuous operation. Forced continu-
ous operation reduces noise and RF interference while
Burst Mode operation provides high efficiency by reduc-
ing gate charge losses at light loads. In Burst Mode
operation, external control of the burst clamp level allows
the output voltage ripple to be adjusted according to the
requirements of the application. A tracking input in the
LTC3418 allows for proper sequencing with respect to
another power supply.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode and OPTI-LOOP are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131,
6724174.
TYPICAL APPLICATIO
VIN
2.8V TO 5.5V
2.5V/8A Step-Down Regulator
2.2M
1000pF
30.1k
4.99k
SVIN TRACK PVIN
RT SW
LTC3418
PGOOD
RUN/SS PGND
ITH SGND
SYNC/MODE VFB
820pF
3324.32k
1.69k
CIN
100µF
0.2µH
VOUT
2.5V
COUT 8A
100µF
×2
3418 TA01a
Efficiency and Power Loss vs Load Current
100
90
80
70
60
50
40
30
20
0.01
EFFICIENCY
100000
10000
POWER LOSS
1000
100
10
VIN = 3.3V
VOUT = 2.5V
1
0.1 1 10
LOAD CURRENT (A)
3418 TA01b
3418f
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LTC3418 pdf
LTC3418www.DataSheet4U.com
TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C unless otherwise noted.
Peak Inductor Current
vs Burst Clamp Voltage
12
10
8
6
4
5V
2
3.3V
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
VBCLAMP (V)
3418 G13
Load Step Transient
Load Regulation
0
–0.05
–0.10
VIN = 3.3V
VOUT = 1.8V
f = 1MHz
Load Step Transient
OUTPUT
VOLTAGE
100mV/DIV
–0.15
–0.20
INDUCTOR
CURRENT
5A/DIV
–0.25
–0.30
0 1234 56
LOAD CURRENT (A)
Burst Mode Operation
78
3418 G14
VIN = 3.3V
20µs/DIV
VOUT = 2.5V
LOAD STEP: 800mA TO 8A
Start-Up Transient
3418 G15
OUTPUT
VOLTAGE
100mV/DIV
INDUCTOR
CURRENT
5A/DIV
VIN = 3.3V
40µs/DIV
VOUT = 2.5V
LOAD STEP: 3A TO 8A
OUTPUT
VOLTAGE
100mV/DIV
INDUCTOR
CURRENT
1A/DIV
3418 G16
VIN = 3.3V
VOUT = 2.5V
LOAD: 200mA
20µs/DIV
OUTPUT
VOLTAGE
500mV/DIV
3418 G17
INDUCTOR
CURRENT
2A/DIV
VIN = 3.3V
VOUT = 2.5V
LOAD: 8A
1ms/DIV
3418 G18
PI FU CTIO S
SW (Pins 1, 2, 11, 12, 20, 21, 30, 31): Switch Node
Connection to Inductor. This pin connects to the drains of
the internal main and synchronous power MOSFET
switches.
PVIN (Pins 3, 4, 9, 10, 22, 23, 28, 29): Power Input
Supply. Decouple this pin to PGND with a capacitor.
PGOOD (Pin 5): Power Good Output. Open-drain logic
output that is pulled to ground when the output voltage is
not within ±7.5% of regulation point.
RT (Pin 6): Oscillator Resistor Input. Connecting a resistor
to ground from this pin sets the switching frequency.
RUN/SS (Pin 7): Run Control and Soft-Start Input. Forcing
this pin below 0.5V shuts down the LTC3418. In shutdown
all functions are disabled drawing <1.5µA of supply cur-
rent. A capacitor to ground from this pin sets the ramp
time to full output current.
SGND (Pin 8): Signal Ground. All small-signal compo-
nents and compensation components should connect to
this ground, which in turn connects to PGND at one point.
PGND (Pins 13, 14, 15, 17, 18, 19, 32, 33, 34, 36, 37,
38): Power Ground. Connect this pin closely to the (–)
terminal of CIN and COUT.
VREF (Pin 16): Reference Output. Decouple this pin with a
2.2µF capacitor.
SVIN (Pin 24): Signal Input Supply. Decouple this pin to
SGND with a capacitor.
3418f
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LTC3418 arduino
LTC3418www.DataSheet4U.com
APPLICATIO S I FOR ATIO
VOUT
VFB
LTC3418
SGND
R2
R1
3418 F01
Figure 1. Setting the Output Voltage
Burst Clamp Programming
If the voltage on the SYNC/MODE pin is less than VIN by 1V,
Burst Mode operation is enabled. During Burst Mode
operation, the voltage on the SYNC/MODE pin determines
the burst clamp level, which sets the minimum peak
inductor current, IBURST, for each switching cycle. A graph
showing the relationship between the minimum peak
inductor current and the voltage on the SYNC/MODE pin
can be found in the Typical Performance Characteristics
section. In the graph, VBURST is the voltage on the SYNC/
MODE pin. IBURST can only be programmed in the range of
0A to 10A. For values of VBURST less than 0.4V, IBURST is
set at 0A. As the output load current drops, the peak
inductor currents decrease to keep the output voltage in
regulation. When the output load current demands a peak
inductor current that is less than IBURST, the burst clamp
will force the peak inductor current to remain equal to
IBURST regardless of further reductions in the load current.
Since the average inductor current is greater than the
output load current, the voltage on the ITH pin will de-
crease. When the ITH voltage drops to 350mV, sleep mode
is enabled in which both power MOSFETs are shut off and
switching action is discontinued to minimize power con-
sumption. All circuitry is turned back on and the power
MOSFETs begin switching again when the output voltage
drops out of regulation. The value for IBURST is determined
by the desired amount of output voltage ripple. As the
value of IBURST increases, the sleep period between pulses
and the output voltage ripple increase. The burst clamp
voltage, VBURST, can be set by a resistor divider from the
VFB pin to the SGND pin as shown in the Typical Applica-
tion on the front page of this data sheet.
Pulse skipping, which is a compromise between low out-
put voltage ripple and efficiency during low load current
operation, can be implemented by connecting the
SYNC/MODE pin to ground. This sets IBURST to 0A. In this
condition, the peak inductor current is limited by the mini-
mum on-time of the current comparator; and the lowest
output voltage ripple is achieved while still operating dis-
continuously. During very light output loads, pulse skipping
allows only a few switching cycles to be skipped while main-
taining the output voltage in regulation.
Voltage Tracking
The LTC3418 allows the user to program how its output
voltage ramps during start-up by means of the TRACK pin.
Through this pin, the output voltage can be set up to either
track coincidentally or ratiometrically follow another out-
put voltage as shown in Figure 2. If the voltage on the
TRACK pin is less than 0.8V, voltage tracking is enabled.
During voltage tracking, the output voltage regulates to
the tracking voltage through a resistor divider network.
VOUT2
VOUT1
TIME
3418 F02a
Figure 2a. Coincident Tracking
VOUT2
VOUT1
TIME
3418 F02a
Figure 2b. Ratiometric Sequencing
3418f
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