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PDF LTC3416 Data sheet ( Hoja de datos )
| Número de pieza | LTC3416 | |
| Descripción | 4A/ 4MHz/ Monolithic Synchronous Step-Down Regulator | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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LTC3416www.DataSheet4U.com
4A, 4MHz, Monolithic
Synchronous Step-Down
Regulator with Tracking
FEATURES
s High Efficiency: Up to 95%
s 4A Output Current
s Low RDS(ON) Internal Switch: 67mΩ
s Tracking Input to Provide Easy Supply Sequencing
s Programmable Frequency: 300kHz to 4MHz
s 2.25V to 5.5V Input Voltage Range
s ±2% Output Voltage Accuracy
s 0.8V Reference Allows Low Output Voltage
s Low Dropout Operation: 100% Duty Cycle
s Power Good Output Voltage Monitor
s Overtemperature Protected
s Available in a 20-Lead Thermally Enhanced
TSSOP Package
U
APPLICATIO S
s Portable Instruments
s Notebook Computers
s Distributed Power Systems
s Battery-Powered Equipment
s POL Board Power
DESCRIPTIO
The LTC®3416 is a high efficiency monolithic synchro-
nous, step-down DC/DC converter utilizing a constant
frequency, current mode architecture. It operates from an
input voltage range of 2.25V to 5.5V and provides a
regulated output voltage from 0.8V to 5V while delivering
up to 4A of output current. The internal synchronous
power switch with 67mΩ of on-resistance increases effi-
ciency and eliminates the need for an external Schottky
diode. Switching frequency is set by an external resistor.
100% duty cycle provides low dropout operation extend-
ing battery life in portable systems. OPTI-LOOP® compen-
sation allows the transient response to be optimized over
a wide range of loads and output capacitors.
The LTC3416 operates in forced continuous operation and
provides tracking of another power supply rail. Forced
continuous operation reduces noise and RF interference and
provides excellent transient response. Fault protection is
provided by an overcurrent comparator, and adjustable
compensation allows the transient response to be optimized
over a wide range of loads and output capacitors.
, LTC and LT are registered trademarks of Linear Technology Corporation.
OPTI-LOOP is a registered trademark of Linear Technology Corporation.
TYPICAL APPLICATIO
VIN
2.5V TO 5.5V
I/O VOLTAGE
VOUT2
2.5V
127k
7.5k
SVIN PVIN
RT PGOOD
SW
LTC3416
RUN/SS PGND
ITH SGND
TRACK VFB
22µF
0.2µH
820pF
255k
200k
255k
200k
3416 F01a
100µF
×2
VOUT1
1.8V
4A
Figure 1a. 2.5V/4A Step-Down Regulator with Tracking
100
90
80
70
60
50
40
30
20
10
0
0.01
VIN = 2.5V
VIN = 3.3V
VOUT = 1.8V
f = 2MHz
0.10 1
LOAD CURRENT (A)
10
3416 G09
Figure 1b. Efficiency vs Load Current
3416f
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LTC3416www.DataSheet4U.com
PI FU CTIO S
PGND (Pins 1, 10, 11, 20): Power Ground. Connect this
pin closely to the (–) terminal of CIN and COUT.
RT (Pin 2): Oscillator Resistor Input. Connecting a resistor
to ground from this pin sets the switching frequency.
TRACK (Pin 3): Tracking Voltage Input. Applying a voltage
that is less than 0.8V to this pin enables tracking. During
tracking, the VFB pin will regulate to the voltage on this pin.
Do not float this pin.
RUN/SS (Pin 4): Run Control and Soft-Start Input. Forcing
this pin below 0.5V shuts down the LTC3416. In shutdown
all functions are disabled, drawing <1µA of supply current.
A capacitor to ground from this pin sets the ramp time to
full output current.
SGND (Pin 5): Signal Ground. All small-signal compo-
nents and compensation components should connect to
this ground, which in turn connects to PGND at one point.
NC (Pins 6, 15): No Connect.
PVIN (Pins 7, 14): Power Input Supply. Decouple this pin
to PGND with a capacitor.
SW (Pins 8, 9, 12, 13): Switch Node Connection to
Inductor. This pin connects to the drains of the internal
main and synchronous power MOSFET switches.
SVIN (Pin 16): Signal Input Supply. Decouple this pin to
the SGND capacitor.
PGOOD (Pin 17): Power Good Output. Open-drain logic
output that is pulled to ground when the output voltage is
not within ±7.5% of the regulation point.
ITH (Pin 18): Error Amplifier Compensation Point. The
current comparator threshold increases with this control
voltage. Nominal voltage range for this pin is from 0.2V to
1.4V with 0.4V corresponding to the zero-sense voltage
(zero current).
VFB (Pin 19): Feedback Pin. Receives the feedback voltage
from a resistive divider connected across the output.
Exposed Pad (Pin 21): Ground. Connect to SGND.
3416f
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LTC3416www.DataSheet4U.com
APPLICATIO S I FOR ATIO
VOUT2
R5
SLAVE
VFB
LTC3416
SGND
R4
R3
MASTER
TRACK
VFB
LTC3416
SGND
VOUT1
R2
R1
3416 F05
Figure 5. Dual Voltage System with Tracking
Soft-Start
The RUN/SS pin provides a means to shut down the
LTC3416 as well as a timer for soft-start. Pulling the RUN/
SS pin below 0.5V places the LTC3416 in a low quiescent
current shutdown state (IQ < 1µA).
The soft-start gradually raises the clamp on ITH. The full
current range becomes available on ITH after the voltage
on ITH reaches approximately 2V. The clamp on ITH is set
externally with a resistor and capacitor on the RUN/SS pin
as shown in Figure 1a. The soft-start duration can be
calculated by using the following formula:
tSS
=
RSSCSSIn
VIN
VIN
– 1.8V
(Seconds)
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses: VIN quiescent current and I2R losses.
The VIN quiescent current loss dominates the efficiency
loss at very low load currents whereas the I2R loss
dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve at
very low load currents can be misleading since the actual
power lost is of no consequence.
1. The VIN quiescent current is due to two components:
the DC bias current as given in the electrical character-
istics and the internal main switch and synchronous
switch gate charge currents. The gate charge current
results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
switched from high to low to high again, a packet of
charge dQ moves from VIN to ground. The resulting
dQ/dt is the current out of VIN that is typically larger
than the DC bias current. In continuous mode, IGATECHG
= f(QT + QB) where QT and QB are the gate charges of
the internal top and bottom switches. Both the DC bias
and gate charge losses are proportional to VIN and thus
their effects will be more pronounced at higher supply
voltages.
2. I2R losses are calculated from the resistances of the
internal switches, RSW, and external inductor RL. In
continuous mode the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET RDS(ON) and the duty cycle
(DC) as follows:
RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)
The RDS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Characteris-
tics curves. Thus, to obtain I2R losses, simply add RSW
to RL and multiply the result by the square of the
average output current.
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for less
than 2% of the total loss.
In most applications, the LTC3416 does not dissipate
much heat due to its high efficiency. But in applications
where the LTC3416 is running at high ambient tempera-
ture with low supply voltage and high duty cycles, such as
3416f
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11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet LTC3416.PDF ] | |
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