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PDF LTC4357 Data sheet ( Hoja de datos )
| Número de pieza | LTC4357 | |
| Descripción | Positive High Voltage Ideal Diode Controller | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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Features
n Reduces Power Dissipation by Replacing a Power
Schottky Diode with an N-Channel MOSFET
n 0.5µs Turn-Off Time Limits Peak Fault Current
n Wide Operating Voltage Range: 9V to 80V
n Smooth Switchover without Oscillation
n No Reverse DC Current
n Available in 6-Lead (2mm × 3mm) DFN and
8-Lead MSOP Packages
Applications
n N + 1 Redundant Power Supplies
n High Availability Systems
n AdvancedTCA Systems
n Telecom Infrastructure
n Automotive Systems
LTC4357
Positive High Voltage
Ideal Diode Controller
Description
The LTC®4357 is a positive high voltage ideal diode control-
ler that drives an external N-channel MOSFET to replace a
Schottky diode. When used in diode-OR and high current
diode applications, the LTC4357 reduces power consump-
tion, heat dissipation, voltage loss and PC board area.
The LTC4357 easily ORs power sources to increase total
system reliability. In diode-OR applications, the LTC4357
controls the forward voltage drop across the MOSFET to
ensure smooth current transfer from one path to the other
without oscillation. If the power source fails or is shorted,
a fast turn-off minimizes reverse current transients.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
Typical Application
48V, 10A Diode-OR
VINA FDB3632
48V
IN
GATE
OUT
LTC4357
GND
VDD
VOUT TO LOAD
VINB FDB3632
48V
IN
GATE
OUT
LTC4357
GND
VDD
4357 TA01
*SEE FIGURES 2 AND 3 FOR ADDITIONAL OPTIONAL COMPONENTS
Power Dissipation vs Load Current
6
5
DIODE (MBR10100)
4
3 POWER
SAVED
2
1
FET (FDB3632)
0
0 2 4 6 8 10
CURRENT (A)
4357 TA01b
4357fd
1 page  
LTC4357
Pin Functions
Exposed Pad: Exposed pad may be left open or connected
to GND.
GATE: Gate Drive Output. The GATE pin pulls high, enhanc-
ing the N-channel MOSFET when the load current creates
more than 25mV of voltage drop across the MOSFET.
When the load current is small, the gate is actively driven
to maintain 25mV across the MOSFET. If reverse current
develops more than –25mV of voltage drop across the
MOSFET, a fast pull-down circuit quickly connects the
GATE pin to the IN pin, turning off the MOSFET.
GND: Device Ground.
IN: Input Voltage and GATE Fast Pull-Down Return. IN is
the anode of the ideal diode and connects to the source
of the N-channel MOSFET. The voltage sensed at this pin
is used to control the source-drain voltage across the
MOSFET. The GATE fast pull-down current is returned
through the IN pin. Connect this pin as close as possible
to the MOSFET source.
NC: No Connection. Not internally connected.
OUT: Drain Voltage Sense. OUT is the cathode of the ideal
diode and the common output when multiple LTC4357s
are configured as an ideal diode-OR. It connects to the
drain of the N-channel MOSFET. The voltage sensed at
this pin is used to control the source-drain voltage across
the MOSFET.
VDD: Positive Supply Input. The LTC4357 is powered from
the VDD pin. Connect this pin to OUT either directly or
through an RC hold-up circuit.
block diagram
IN
GATE
OUT
17V
FPD
COMP
25mV +–
CHARGE PUMP
GATE
+ AMP –
IN
–+ 25mV
VDD
GND
4357 BD
4357fd
5 Page 
Package Description
DCB Package
6-Lead Plastic DFN (2mm × 3mm)
(Reference LTC DWG # 05-08-1715 Rev A)
LTC4357
0.70 p0.05
2.00 p0.10
(2 SIDES)
R = 0.115
R = 0.05
TYP
TYP
4
0.40 p 0.10
6
3.55 p0.05
1.65 p0.05
(2 SIDES)
2.15 p0.05
PACKAGE
OUTLINE
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.25 p 0.05
0.50 BSC
1.35 p0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.200 REF
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (TBD)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3.00 p0.10 1.65 p 0.10
(2 SIDES) (2 SIDES)
0.75 p0.05
0.00 – 0.05
PIN 1 NOTCH
R0.20 OR 0.25
s 45o CHAMFER
31
(DCB6) DFN 0405
0.25 p 0.05
0.50 BSC
1.35 p0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
4357fd
11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet LTC4357.PDF ] | |
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