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PDF LTC3725 Data sheet ( Hoja de datos )
| Número de pieza | LTC3725 | |
| Descripción | Single-Switch Forward Controller and Gate Driver | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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FEATURES
■ High Speed Gate Driver for Forward Converter
■ On-Chip Rectifier and Self-Starting Architecture
Eliminates Need for Separate Gate Drive Bias
Supply
■ Wide Input Voltage Supply Range: 9V and Up
■ Linear Regulator Controller for Fast Start-Up
■ Precision UVLO with Adjustable Hysteresis
■ Overcurrent Protection
■ Volt-Second Limit Prevents Transformer Core
Saturation
■ Voltage Feedforward for Fast Transient Response
■ Available in 10-Lead MSOP Package
U
APPLICATIO S
■ Isolated 48V Telecommunication Systems
■ Internet Servers and Routers
■ Distributed Power Step-Down Converters
■ Automotive and Heavy Equipment
LTC3725www.DataSheet4U.com
Single-Switch Forward
Controller and Gate Driver
DESCRIPTIO
The LTC®3725 is a controller for a single-switch forward
converter and includes an on-chip gate driver.
For secondary-side control, combine the LTC3725 with
the LTC3706 PolyPhase® secondary-side synchronous
forward controller to create a complete forward converter
using a minimum of discrete parts. A proprietary scheme
is used to multiplex gate drive signals across the isolation
barrier through a tiny pulse transformer. The on-chip
rectifier and the same pulse transformer provide gate drive
bias power.
Alternatively, the LTC3725 can be used as a standalone
voltage mode controller in a primary-side control architec-
ture with optoisolator feedback. Voltage feedforward pro-
vides excellent line regulation and transient response.
, LTC and LT are registered trademarks of Linear Technology Corporation. PolyPhase is
a registered trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Patent Pending
TYPICAL APPLICATIO
VIN+
36V TO 72V
1µF
100V
×2
VIN–
36V-72V to 3.3V/30A Isolated Single-Switch Forward Converter
T1
•
•
L1
0.85µH
Si7450DP
0.030Ω
1W
•
2.2nF
200V
HAT2165
×2
0.0012Ω
1W
HAT2165
×2
B0540W
1.2Ω
1/4W
100µF
6.3V
×2
10µF
365k
15k
100k
FDC2512
NDRV GATE IS
VCC FB/IN+
UVLO LTC3725
1µF
SSFLT
FS/IN–
VSLMT PGND GND
33nF
0.1µF
T2
••
5.1k
162k
L1: PULSE PA1294.910
T1: PULSE PA0815
T2: PULSE PA0297
FCX491A
2.2µF
1µF FG SW IS–
PT+
IS+
SG VIN NDRV VCC MODE
LTC3706
PT–
GND PGND RUN/SS SLP REGSD FS/SYNC PHASE
FB
ITH
33nF 100k
470pF
3.3k
47nF
VOUT+
3.3V
30A
+
220µF
6.3V
VOUT–
2.74k
604Ω
3725 TA01
3725f
1
1 page  
TYPICAL PERFOR A CE CHARACTERISTICS
LTC3725www.DataSheet4U.com
Gate Drive Pull-Down Resistance
vs Temperature
2.50
Gate Drive Peak Pull-Up Current
vs Temperature
2.0
1.9
2.25
1.8
2.00
1.7
1.75
1.6
1.50
–60 –40 –20 0 20 40 60
TEMPERATURE (°C)
80 100
3725 G10
1.5
–60 –40 –20 0 20 40 60
TEMPERATURE (°C)
80 100
3725 G11
Linear Regulator Start-Up
Gate Drive Encoding
Fault Operation
VIN
GATE
10V/DIV
GATE
5V/DIV
NDRV
25µs/DIV
VCC
3725 G12
10V/DIV
FB/IN
FS/IN–
1µs/DIV
SSFLT
3705 G13
2V/DIV
40ms/DIV
3725 G14
3725f
5
5 Page 
LTC3725www.DataSheet4U.com
APPLICATIO S I FOR ATIO
UVLO
The UVLO pin is connected to a resistive voltage divider
connected to VIN as shown in Figure 2. The voltage
threshold on the UVLO pin for VIN rising is 1.242V. To
introduce hysteresis, the LTC3725 draws 4.9µA from the
UVLO pin when VIN is rising. The hysteresis is therefore
user adjustable and depends on the value of R1. The UVLO
threshold for VIN rising is:
VIN(UVLO, RISING)
=
(1.242V)R1+ R2
R2
+ R1(4.9µA)
The LTC3725 also has 16mV of voltage hysteresis on the
UVLO pin so that the UVLO threshold for VIN falling is:
VIN(UVLO, FALLING)
=
(1.226V)R1+ R2
R2
To implement external Run/Stop control, connect a small
NMOS to the UVLO pin as shown in Figure 2. Turning the
NMOS on grounds the UVLO pin and prevents the LTC3725
from running.
VIN
UVLO
R1
LTC3725
GND
RUN/STOP
R2 CONTROL
(OPTIONAL)
3725 F02
Figure 2. Resistive Voltage Divider for
UVLO and Optional Run/Stop Control
Linear Regulator
The linear regulator eliminates the long start-up times
associated with a conventional trickle charger by using an
external NMOS to quickly charge the capacitor connected
to the VCC pin.
Note that a trickle charger usually requires a large capaci-
tor to provide holdup for the VCC pin while the converter
attempts to start. The linear regulator in the LTC3725 can
both charge the capacitor connected to the VCC pin and
provide primary-side gate-drive bias current. Therefore,
with the linear regulator, the capacitor need only be large
enough to cope with the ripple current from driving the gate
of the primary FET and holdup need not be considered.
The external NMOS for the linear regulator should be a
standard 3V threshold type (i.e. not a logic level thresh-
old). The rate of charge of VCC from 0V to 8V is controlled
by the LTC3725 to be approximately 45µs regardless of
the size of the capacitor connected to the VCC pin. The
charging current for this capacitor is approximately:
IC
=
8V C
45µs
The safe operating area (SOA) for the external NMOS
should be chosen so that capacitor charging does not
damage the NMOS. Excessive values of capacitor are
unnecessary and should be avoided.
Start-Up Considerations
When used in a self-starting converter with the LTC3706,
the LTC3725 initially begins the soft-start of the converter
in an open-loop fashion. After bias is obtained on the
secondary side, the LTC3706 assumes control and com-
pletes the soft-start interval. In order to ensure that control
is properly transferred from the LTC3725 (primary-side)
to the LTC3706 (secondary-side), it is necessary to limit
the rate of rise on the primary-side soft-start ramp so that
the LTC3706 has adequate time to wake up and assume
control before the output voltage gets too high. This
condition is satisfied for many applications if the following
relationship is maintained:
CSS,SEC ≤ CSS_PRI
3725f
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet LTC3725.PDF ] | |
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