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PDF LTC4212 Data sheet ( Hoja de datos )
| Número de pieza | LTC4212 | |
| Descripción | Hot Swap Controller | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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FEATURES
s Allows Safe Board Insertion and Removal
from a Live Backplane
s Controls Supply Voltages from 2.5V to 16.5V
s Adjustable Soft-Start with Inrush Current
Limiting
s Fast Turn-Off Time
s No External Gate Capacitor is Required
s Power Good Input with Adjustable Timer and
Glitch Filter
s Power-Up Timeout Circuit Interfaces with External
Supply Monitors
s Dual Level Overcurrent Fault Protection
s Automatic Retry or Latched Mode Operation
s High Side Drive for an External N-Channel FET
s MS10 Package
U
APPLICATIO S
s Electronic Circuit Breaker
s Hot Board Insertion and Removal
s Self-Isolating Hot Swap Boards
, LTC and LT are registered trademarks of Linear Technology Corporation.
Hot Swap is a trademark of Linear Technology Corporation.
LTC4212
Hot Swap Controller with
Power-Up Timeout
DESCRIPTIO
The LTC®4212 is a Hot SwapTM controller that allows a
board to be safely inserted and removed from a live
backplane. An internal high side switch driver controls the
gate of an external N-channel MOSFET for supply voltages
ranging from 2.5V to 16.5V. The LTC4212 provides soft-
start and inrush current limiting during the start-up
period. It features a power-up timeout circuit that discon-
nects the system supply when the onboard supplies do not
enter into regulation within an adjustable timeout period.
The controller interfaces with external supply monitor ICs
or directly with the PGOOD pin of a DC/DC converter. After
normal power-up, a programmable power good glitch
filter can be enabled to filter out short term dips in the
supplies.
Two current limit comparators provide dual level
overcurrent circuit breaker protection. The slow com-
parator trips at VCC – 50mV and activates in 18µs. The fast
comparator trips at VCC – 150mV and typically responds
in 500ns.
The LTC4212 can be configured for both latchoff and
autoretry applications and is available in a 10-pin MSOP
package.
TYPICAL APPLICATIO
Hot Swap Controller with Power Good Function
BACKPLANE EDGE
CONNECTOR CONNECTOR
(FEMALE) (MALE)
VCC
5V
0.007Ω
Z1 10Ω
100nF
Si4410DY
+
10µF
+ LT1963-2.5
10µF
+
10µF
5V
2.5V
1.5A
FAULT
10k
10k
VCC
ON
20k
FAULT
GND
TIMER
0.01µF
SENSE GATE
LTC4212
PGI
+
10k
10k
PGT PGF
4.7nF
270pF
2.1k
LT1963-3.3
10µF
+
10µF
VCCA
VCC3
LTC1727-2.5
COMP2.5 VCC25
COMP3
COMP A GND
3.3V
1.5A
GND
Z1 = SMAJ10A (TVS)
4212 TA01a
Power-Up Waveforms
ON
5V/DIV
TIMER
1V/DIV
PGT
1V/DIV
PGI
5V/DIV
5ms/DIV
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LTC4212
TYPICAL PERFOR A CE CHARACTERISTICS Specifications are TA = 25°C. VCC = 5V, unless
otherwise noted.
Fast GATE Pull-Down Current vs
Supply Voltage
80
70
60
50
40
30
20
0 2 4 6 8 10 12 14 16 18
SUPPLY VOLTAGE (V)
4212 G14
VCB (FAST COMP) vs Supply
Voltage
170
165
160
155
150
145
140
135
130
0 2 4 6 8 10 12 14 16 18
SUPPLY VOLTAGE (V)
4212 G28
Fast GATE Pull-Down Current vs
Temperature
80
70
60
50
40
30
20
–50 –25
0 25 50 75 100 125
TEMPERATURE (°C)
4212 G15
SLOW COMP Trips to GATE
Discharging Delay vs Supply
Voltage
26
24
22
20
18
16
14
12
10
0 2 4 6 8 10 12 14 16 18
SUPPLY VOLTAGE (V)
4212 G30
VCB (SLOW COMP) vs Supply
Voltage
60
58
56
54
52
50
48
46
44
42
40
0 2 4 6 8 10 12 14 16 18
SUPPLY VOLTAGE (V)
4212 G26
SLOW COMP Trips to GATE
Discharging Delay vs Temperature
26
24 VCC = 12V VCC = 15V
VCC = 16.5V
22
20
18 VCC = 5V
VCC = 3V
16
14
12
10
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
4212 G31
FAST COMP Trips to GATE
Discharging Delay vs Supply
Voltage
600
VCB = 0mV TO 200mV STEP
500
400
300
200
100
FAST COMP Trips to GATE
Discharging Delay vs Temperature
700
VCB = 0mV TO 200mV STEP
600
VCC = 3V
500
400
300
200
100 VCC = 15V
VCC = 5V
VCC = 12V
VCC = 16.5V
Power Good Timeout vs Supply
Voltage
21
20
19
18
17
16
0
0 2 4 6 8 10 12 14 16 18
SUPPLY VOLTAGE (V)
4212 G32
0
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
4212 G33
15
0 2 4 6 8 10 12 14 16 18
SUPPLY VOLTAGE (V)
4212 G40
4212f
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U
OPERATIO
set CTIMER␣ = 10nF and adjust its value accordingly to suit
the specific applications.
Table 1. tTIMER vs CTIMER
CTIMER
0.0033µF
0.0047µF
0.0068µF
0.0082µF
0.01µF
0.015µF
0.022µF
0.033µF
0.047µF
0.068µF
0.082µF
0.1µF
0.15µF
0.22µF
0.33µF
tTIMER
2.0ms
2.9ms
4.2ms
5.1ms
6.2ms
9.3ms
13.6ms
20.4ms
29.0ms
42.0ms
50.7ms
61.8ms
92.7ms
136ms
204ms
Power-Up Timeout Circuit
The power-up timeout circuit has two functions. During
power-up, it trips the circuit breaker if the DC/DC convert-
ers on the board do not power-up and do not enter
regulation on time. After normal power-up, it is configured
to trip the circuit breaker if any of the converters exit
regulation for longer than a programmable delay. Once the
circuit breaker is tripped, the LTC4212 is latched off and
the board is disconnected from the system supply. The ON
pin must be taken low for 120µs to reset the circuit breaker
and then high to reconnect the board to the backplane
supply.
The power-up timeout circuit uses three pins: PGI or
power good input pin, PGT or power good timer pin and
PGF or power good filter pin. It is enabled at the end of the
second system timing cycle, provided that the FAULT pin
is high. Prior to being enabled or if FAULT is low, the PGT
and PGF pins are pulled to GND by internal N-channel
FETs, M5 and M12 respectively. When enabled, the
power-up timeout circuit starts the power good timer,
which generates a time-out period before the PGI pin is
sampled.
LTC4212
Power Good Timer
The timer consists of COMP9, M8-M12, two 5µA current
sources and 0.65V and 0.95V threshold voltages for
COMP9.
The PGI pin is normally connected to the RST output pin
or comparator outputs of an external supply monitor IC or
to the PGOOD pin of a DC/DC converter and drives a
comparator, COMP8 which has a threshold voltage of
1.236V and 28mV of hysterisis. The RST and PGOOD pins
are typically open drain pins and require an external pull-
up resistor. The upper end of the resistor must be con-
nected to a voltage greater than the upper threshold of the
PGI comparator (1.236V).
A capacitor, CPGT, connected from the PGT pin to ground
programs the time-out period generated by the power
good timer according to Equation 3. Table 2 shows the
power good time-out periods for a list of standard capaci-
tor values.
tTIMEOUT = 1.81Ω • CPGT
(3)
Two 5µA current sources are switched in and out to charge
and discharge CPGT between 0.65V and 0.95V for 14
cycles.
Table 2. tTIMEOUT vs CPGT
CPGT
3.3nF
4.7nF
6.8nF
8.2nF
0.01µF
0.022µF
0.033µF
0.047µF
0.068µF
0.082µF
0.1µF
0.22µF
0.33µF
0.47µF
0.68µF
0.82µF
1µF
tTIMEOUT
5.97ms
8.51ms
12.3ms
14.8ms
18.1ms
39.8ms
59.7ms
85.1ms
123ms
148ms
181ms
136ms
398ms
851ms
1230ms
1480ms
1810ms
4212f
11
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet LTC4212.PDF ] | |
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