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PDF LM5035B Data sheet ( Hoja de datos )
| Número de pieza | LM5035B | |
| Descripción | PWM Controller | |
| Fabricantes | National Semiconductor | |
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LM5035B
July 7, 2009
PWM Controller with Integrated Half-Bridge and SyncFET
Drivers
General Description
The LM5035B Half-Bridge Controller/Gate Driver contains all
of the features necessary to implement half-bridge topology
power converters using voltage mode control with line voltage
feed-forward.
The LM5035B is a functional variant of the LM5035A half-
bridge PWM controller. The LM5035B provides higher maxi-
mum duty cycle and higher start-up regulator output current
than the LM5035A or LM5035. Also, the Synchronous Recti-
fier drive outputs of the LM5035B are held low in shutdown
modes.
The LM5035, LM5035A, and LM5035B include a floating
high-side gate driver, which is capable of operating with sup-
ply voltages up to 105V. Both the high-side and low-side gate
drivers are capable of 2A peak. An internal high voltage start-
up regulator is included, along with programmable line un-
dervoltage lockout (UVLO) and overvoltage protection (OVP).
The oscillator is programmed with a single resistor to fre-
quencies up to 2MHz. The oscillator can also be synchronized
to an external clock. A current sense input and a pro-
grammable timer provide cycle-by-cycle current limit and ad-
justable hiccup mode overload protection.
Features
■ 105V / 2A Half-Bridge Gate Drivers
■ Synchronous Rectifier Control Outputs with
Programmable Delays
■ Synchronous Rectifiers Turned Off in Shutdown Modes.
■ Reduced Deadtime Between High and Low Side Drive for
Higher Maximum Duty Cycle.
■ High Voltage (105V) Start-up Regulator
■ Voltage mode Control with Line Feed-Forward and Volt
Second Limiting
■ Resistor Programmed, 2MHz Capable Oscillator
■ Programmable Line Under-Voltage Lockout and Over-
Voltage Protection
■ Internal Thermal Shutdown Protection
■ Adjustable Soft-Start
■ Versatile Dual Mode Over-Current Protection with Hiccup
Delay Timer
■ Cycle-by-Cycle Over-Current Protection
■ Direct Opto-coupler Interface
■ 5V Reference Output
Packages
■ TSSOP-20EP (Thermally enhanced)
■ LLP-24 (4mm x 5mm)
Simplified Application Diagram
© 2009 National Semiconductor Corporation 300913
30091301
www.national.com
1 page  
wwAwb.DsatoaSlhueette4UM.coamximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VIN to GND
HS to GND
HB to GND
HB to HS
VCC to GND
RT, DLY to GND
COMP Input Current
-0.3V to 105V
-1V to 105V
-0.3V to 118V
-0.3V to 18V
-0.3V to 16V
-0.3V to 5.5V
10mA
CS
All other inputs to GND
ESD Rating (Note 4)
Human Body Model
Storage Temperature Range
Junction Temperature
1.0V
-0.3V to 7V
2kV
-65°C to 150°C
150°C
Operating Ratings (Note 1)
VIN Voltage
External Voltage Applied to VCC
Operating Junction Temperature
13V to 105V
8V to 15V
-40°C to +125°C
Electrical Characteristics Specifications with standard typeface are for TJ = 25°C, and those with boldface type
apply over full Operating Junction Temperature range. VVIN = 48V, VVCC = 10V externally applied, RRT = 15.0 kΩ, RDLY =
27.4kΩ, VUVLO = 3V, VOVP = 0V unless otherwise stated. See (Note 2) and (Note 3).
Symbol Parameter
Conditions
Min Typ Max Units
Startup Regulator (VCC pin)
VVCC
IVCC(LIM)
VVCCUV
VCC voltage
IVCC = 10mA
VCC current limit
VVCC = 7V
VCC Under-voltage threshold (VCC VIN = VCC, ΔVVCC from the regulation
increasing)
setpoint
7.3 7.6 7.9
V
58 mA
0.2 0.1
V
VCC decreasing
VCC – PGND
5.5 6.2 6.9
V
IVIN Startup regulator current
Supply current into VCC from
external source
VIN = 90V, UVLO = 0V
Outputs & COMP open, VVCC = 10V,
Outputs Switching
30 70 µA
4 6 mA
Voltage Reference Regulator (REF pin)
VREF
REF Voltage
REF Voltage Regulation
REF Current Limit
IREF = 0mA
IREF = 0 to 10mA
REF = 4.5V
4.85 5 5.15 V
25 50 mV
15 20
mA
Under-Voltage Lock Out and shutdown (UVLO pin)
VUVLO
IUVLO
Under-voltage threshold
Hysteresis current
UVLO pin sinking
Under-voltage Shutdown Threshold UVLO voltage falling
1.212
19
1.25 1.288
23 27
0.3
V
µA
V
Under-voltage Standby Enable
Threshold
UVLO voltage rising
0.4 V
Over-Voltage Protection (OVP pin)
VOVP
Over-Voltage threshold
IOVP Hysteresis current
Current Sense Input (CS Pin)
OVP pin sourcing
1.212
19
1.25 1.288
23 27
V
µA
VCS Current Limit Threshold
CS delay to output
CS from zero to 1V. Time for HO and LO
to fall to 90% of VCC. Output load = 0 pF.
0.228
0.25 0.272
80
V
ns
Leading edge blanking time at CS
50 ns
CS sink impedance (clocked)
Internal FET sink impedance
32 60
Ω
Current Limit Restart (RES Pin)
VRES
RES Threshold
Charge source current
Discharge sink current
VRES = 1.5V
VRES = 1V
2.4 2.5 2.6
V
16 22 28 µA
8 12 16 µA
5 www.national.com
5 Page 
wwFwu.DnatcaSthioeent4Ua.lcoDm escription
The LM5035B PWM controller contains all of the features
necessary to implement half-bridge voltage-mode controlled
power converters. The LM5035B provides two gate driver
outputs to directly drive the primary side power MOSFETs
and two signal level outputs to control secondary syn-
chronous rectifiers through an isolation interface. Secondary
side drivers, such as the LM5110, are typically used to provide
the necessary gate drive current to control the sync MOS-
FETs. Synchronous rectification allows higher conversion ef-
ficiency and greater power density than conventional PN or
Schottky rectifier techniques. The LM5035B can be config-
ured to operate with bias voltages ranging from 8V to 105V.
Additional features include line under-voltage lockout, cycle-
by-cycle current limit, voltage feed-forward compensation,
hiccup mode fault protection with adjustable delays, soft-start,
a 2MHz capable oscillator with synchronization capability,
precision reference, thermal shutdown and programmable
volt•second clamping. These features simplify the design of
voltage-mode half-bridge DC-DC power converters. The
Functional Block Diagram is shown in Figure 1.
High-Voltage Start-Up Regulator
The LM5035B contains an internal high voltage start-up reg-
ulator that allows the input pin (VIN) to be connected directly
to a nominal 48 VDC input voltage. The regulator input can
withstand transients up to 105V. The regulator output at VCC
(7.6V) is internally current limited to 58mA minimum. When
the UVLO pin potential is greater than 0.4V, the VCC regulator
is enabled to charge an external capacitor connected to the
VCC pin. The VCC regulator provides power to the voltage
reference (REF) and the output drivers (LO, SR1 and SR2).
When the voltage on the VCC pin exceeds the UVLO thresh-
old of 7.6V, the internal voltage reference (REF) reaches its
regulation setpoint of 5V and the UVLO voltage is greater than
1.25V, the controller outputs are enabled. The value of the
VCC capacitor depends on the total system design, and its
start-up characteristics. The recommended range of values
for the VCC capacitor is 0.1 µF to 100 µF.
The VCC under-voltage comparator threshold is lowered to
6.2V (typical) after VCC reaches the regulation set-point. If
VCC falls below this value, the outputs are disabled, and the
soft-start capacitor is discharged. If VCC increases above
7.6V, the outputs will be enabled and a soft-start sequence
will commence.
The internal power dissipation of the LM5035B can be re-
duced by powering VCC from an external supply. In typical
applications, an auxiliary transformer winding is connected
through a diode to the VCC pin. This winding must raise the
VCC voltage above 8.3V to shut off the internal start-up reg-
ulator. Powering VCC from an auxiliary winding improves
efficiency while reducing the controller’s power dissipation.
The under-voltage comparator circuit will still function in this
mode, requiring that VCC never falls below 6.2V during the
start-up sequence.
During a fault mode, when the converter auxiliary winding is
inactive, external current draw on the VCC line should be lim-
ited such that the power dissipated in the start-up regulator
does not exceed the maximum power dissipation of the IC
package.
An external DC bias voltage can be used instead of the inter-
nal regulator by connecting the external bias voltage to both
the VCC and the VIN pins. The external bias must be greater
than 8.3V to exceed the VCC UVLO threshold and less than
the VCC maximum operating voltage rating (15V).
Line Under-Voltage Detector
The LM5035B contains a dual level Under-Voltage Lockout
(UVLO) circuit. When the UVLO pin voltage is below 0.4V, the
controller is in a low current shutdown mode. When the UVLO
pin voltage is greater than 0.4V but less than 1.25V, the con-
troller is in standby mode. In standby mode the VCC and REF
bias regulators are active while the controller outputs are dis-
abled. When the VCC and REF outputs exceed the VCC and
REF under-voltage thresholds and the UVLO pin voltage is
greater than 1.25V, the outputs are enabled and normal op-
eration begins. An external set-point voltage divider from VIN
to GND can be used to set the minimum operating voltage of
the converter. The divider must be designed such that the
voltage at the UVLO pin will be greater than 1.25V when VIN
enters the desired operating range. UVLO hysteresis is ac-
complished with an internal 23 µA current sink that is switched
on or off into the impedance of the set-point divider. When the
UVLO threshold is exceeded, the current sink is deactivated
to quickly raise the voltage at the UVLO pin. When the UVLO
pin voltage falls below the 1.25V threshold, the current sink is
enabled causing the voltage at the UVLO pin to quickly fall.
The hysteresis of the 0.4V shutdown comparator is internally
fixed at 100 mV.
The UVLO pin can also be used to implement various remote
enable / disable functions. Turning off a converter by forcing
the UVLO pin to the standby condition provides a controlled
soft-stop. See the Soft Start section for more details.
Line Over Voltage / Load Over
Voltage / Remote Thermal
Protection
The LM5035B provides a multi-purpose OVP pin that sup-
ports several fault protection functions. When the OVP pin
voltage exceeds 1.25V, the controller is held in standby mode
which immediately halts the PWM pulses at the HO and LO
pins. In standby mode, the VCC and REF bias regulators are
active while the controller outputs are disabled. When the
OVP pin voltage falls below the 1.25V OVP threshold, the
outputs are enabled and normal soft-start sequence begins.
Hysteresis is accomplished with an internal 23 µA current
source that is switched on or off into the impedance of the
OVP pin set-point divider. When the OVP threshold is ex-
ceeded, the current source is enabled to quickly raise the
voltage at the OVP pin. When the OVP pin voltage falls below
the 1.25V threshold, the current source is disabled causing
the voltage at the OVP pin to quickly fall.
Several examples of the use of this pin are provided in the
Application Information section.
Reference
The REF pin is the output of a 5V linear regulator that can be
used to bias an opto-coupler transistor and external house-
keeping circuits. The regulator output is internally current
limited to 15mA (minimum).
11 www.national.com
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| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet LM5035B.PDF ] | |
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