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Número de pieza | MAX3798 | |
Descripción | Low-Power SFP Limiting Amplifier and VCSEL Driver | |
Fabricantes | Maxim Integrated Products | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de MAX3798 (archivo pdf) en la parte inferior de esta página. Total 35 Páginas | ||
No Preview Available ! 19-4360; Rev 0; 10/08
www.DataSheet4U.com
1.0625Gbps to 10.32Gbps, Integrated, Low-
Power SFP+ Limiting Amplifier and VCSEL Driver
General Description
The MAX3798 is a highly integrated limiting amplifier
and VCSEL driver designed for 1x/2x/4x/8x Fibre
Channel transmission systems at data rates up to
8.5Gbps as well as for 10GBASE-SR transmission sys-
tems at a data rate of 10.3125Gbps. Operating from a
single +3.3V supply, this low-power integrated limiting
amplifier and VCSEL driver IC enables a platform
design for SFP MSA as well as for SFP+ MSA-based
optical transceivers. The high-sensitivity limiting ampli-
fier limits the differential input signal generated by a
transimpedance amplifier into a CML-level differential
output signal. The compact VCSEL driver provides a
modulation and a bias current for a VCSEL diode. The
optical average power is controlled by an average
power control (APC) loop implemented by a controller
that interfaces to the VCSEL driver through a 3-wire
digital interface. All differential I/Os are optimally back-
terminated for a 50Ω transmission line PCB design.
The use of a 3-wire digital interface reduces the pin
count while enabling advanced Rx (mode selection,
LOS threshold, LOS squelch, LOS polarity, CML output
level, signal path polarity, slew-rate control, deempha-
sis, and fast mode-select change time) and Tx settings
(modulation current, bias current, polarity, programma-
ble deemphasis, eye-crossing adjustment, and eye
safety control) without the need for external compo-
nents. The MAX3798 provides multiple current and volt-
age DACs to allow the use of low-cost controller ICs.
The MAX3798 is packaged in a lead-free, 5mm x 5mm,
32-pin TQFN package.
Applications
10GBASE-SR SFP+ Optical Transceiver
1x/2x/4x/8x SFF/SFP/SFP+ MSA Fibre Channel
(FC) Optical Transceiver
10GBASE-LR SFP+ Optical Transceiver (1310nm
VCSEL)
10GBASE-LRM SFP+ Optical Transceiver
(1310nm VCSEL)
Features
♦ Low Power Dissipation of 320mW at 3.3V Power
Supply
♦ Up to 10.32Gbps (NRZ) Operation
♦ 3mVP-P Receiver Sensitivity at 10.32Gbps
♦ 4psP-P DJ at Receiver Output at 8.5Gbps 8B/10B
♦ 4psP-P DJ at Receiver Output at 10.32Gbps
231 - 1 PRBS
♦ 26ps Rise and Fall Time at Rx/Tx Output
♦ Mode Select for High-Gain Mode and High-
Bandwidth Mode
♦ CML Output Slew-Rate Adjustment for High-Gain
Mode
♦ CML Output with Continuous Level Adjustment
♦ CML Output Squelch
♦ Polarity Select for Rx and Tx
♦ LOS Assert Level Adjustment
♦ LOS Polarity Select
♦ Modulation Current Up to 12mA Into 100Ω
Differential Load
♦ Bias Current Up to 15mA
♦ Integrated Eye Safety Features
♦ Selectable Deemphasis at Rx Output
♦ 3-Wire Digital Interface
♦ Eye-Crossing Adjustment of Modulation Output
♦ Programmable Deemphasis at Tx Output
♦ Fast Mode-Select Change Time of 10µs
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX3798ETJ+
-40°C to +85°C
32 TQFN-EP*
+Denotes a lead-free/RoHS-compliant package.
*EP = Exposed pad.
Typical Application Circuit and Pin Configuration appear at
end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1 page www.DataSheet4U.com
1.0625Gbps to 10.32Gbps, Integrated, Low-
Power SFP+ Limiting Amplifier and VCSEL Driver
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 2.85V to 3.63V, TA = -40°C to +85°C, CML receiver output load is AC-coupled to differential 100Ω, CAZ = 1nF, transmitter out-
put load is AC-coupled to differential 100Ω (see Figure 1), typical values are at +25°C, VCC = 3.3V, IBIAS = 6mA, IMOD = 6mA, unless
otherwise specified. Registers are set to default values unless otherwise noted, and the 3-wire interface is static during measure-
ments. For testing, the MODE_SEL bit was used and the MSEL pin was left open.)
PARAMETER
Random Jitter
Output Return Loss
Tx BIAS GENERATOR
Maximum Bias-On Current
Minimum Bias-On Current
BIAS Current DAC Stability
Compliance Voltage at BIAS
BIAS Current Monitor Current
Gain
Compliance Voltage at BMON
BIAS Current Monitor Current
Gain Stability
Tx SAFETY FEATURES
Excessive Voltage at BMAX
Excessive Voltage at MMAX
SYMBOL
SDD22
CONDITIONS
5mA IMOD 12mA, 250mVP-P VIN
800mVP-P
DUT is powered on, f 5GHz
DUT is powered on, f 16GHz
IBIASMAX
IBIASMIN
VBIAS
IBMON
VBMON
Current into BIAS pin
Current into BIAS pin
2mA IBIAS 15mA (Notes 2, 10)
External resistor to GND defines the
voltage gain
IBMON 2mA IBIAS 15mA (Note 10)
MIN TYP MAX UNITS
0.17
0.5 psRMS
12
dB
5
15 mA
2 mA
4%
0.9 2.1 V
16 mA/A
0 1.8 V
5%
VBMAX
VMMAX
Average voltage, FAULT always occurs for
VBMAX VCC - 0.65V, FAULT never occurs
for VBMAX VCC - 0.55V
VCC -
0.65V
Average voltage, FAULT always occurs for
VMMAX VCC - 0.65V, FAULT never occurs
for VMMAX VCC - 0.55V
VCC -
0.65V
VCC -
0.6V
VCC -
0.6V
VCC -
0.55V
VCC -
0.55V
V
V
Excessive Voltage at BMON
VBMON
Average voltage, FAULT warning always
occurs for VBMON VCC - 0.55V, FAULT
warning never occurs for VBMON VCC -
0.65V
VCC - VCC - VCC -
0.65V 0.6V 0.55V
V
Excessive Voltage at BIAS
Maximum VCSEL Current in Off
State
SFP TIMING REQUIREMENTS
Mode-Select Change Time
DISABLE Assert Time
VBIAS
IOFF
Average voltage, FAULT always occurs for
VBIAS 0.44V, FAULT never occurs for
VBIAS 0.65V
0.44
FAULT or DISABLE, VBIAS = VCC
t_MODESEL
Time from rising or falling edge at MSEL
until Rx output PWD falls below 10ps
t_OFF
Time from rising edge of DISABLE input
signal to IBIAS = IBIASOFF and IMOD =
IMODOFF
0.48
10
0.65
25
1
V
μA
μs
μs
_______________________________________________________________________________________ 5
5 Page www.DataSheet4U.com
1.0625Gbps to 10.32Gbps, Integrated, Low-
Power SFP+ Limiting Amplifier and VCSEL Driver
Typical Operating Characteristics—VCSEL Driver
(VCC = 3.3V, TA = +25°C, unless otherwise specified. Figure 1 shows the typical setup used for measurements. Registers are set to
default values unless otherwise noted, and the 3-wire interface is static during measurements. For testing, the MODE_SEL bit was
used and the MSEL pin was left open.)
TOTAL SUPPLY CURRENT
vs. TEMPERATURE
140
130 IBIAS = 12mA
120
110
100
90 IBIAS = 9mA
80 IBIAS = 2mA
70
60 IMOD = 2mA; RECEIVER OUTPUT = 400mVP-P;
50 TOTAL SUPPLY MEASURED USING THE SETUP
IN FIGURE 1.
40
-40 -25 -10 5 20 35 50 65 80 95
TEMPERATURE (°C)
TOTAL SUPPLY CURRENT
vs. TEMPERATURE
160
150 IMOD = 12mA
140
IMOD = 9mA
130
120
110
100
90
80 IMOD = 2mA
70
60 IBIAS = 2mA; RECEIVER OUTPUT = 400mVP-P;
50
TOTAL SUPPLY MEASURED USING THE SETUP
IN FIGURE 1.
40
-40 -25 -10 5 20 35 50 65 80 95
TEMPERATURE (°C)
OPTICAL EYE DIAGRAM
MAX3798 toc19
10.3Gbps, SET_IMOD = 60, 27 - 1 PRBS,
850nm VCSEL, MASK WITH 44%
14ps/div
OPTICAL EYE DIAGRAM
MAX3798 toc20
8.5Gbps, SET_IMOD = 60, 27 - 1 PRBS,
850nm VCSEL, MASK WITH 54%
OPTICAL EYE DIAGRAM
MAX3798 toc21
4.25Gbps, SET_IMOD = 60, 27 - 1 PRBS,
850nm VCSEL, MASK WITH 46%
OPTICAL EYE DIAGRAM
MAX3798 toc22
2.125Gbps, SET_IMOD = 60, 27 - 1 PRBS,
850nm VCSEL, MASK WITH 50%
17ps/div
34ps/div
68ps/div
DETERMINISTIC JITTER
vs. MODULATION CURRENT
8.0
PATTERN = PRBS, DATA RATE = 10.32Gbps
7.5
7.0
6.5
6.0
5.5
5.0
4.5
2
4 6 8 10
MODULATION CURRENT (mAP-P)
12
38
33
28
23
18
13
8
3
2
TRANSITION TIME
vs. MODULATION CURRENT
FALL TIME
RISE TIME
PATTERN = 11110000,
DATA RATE = 8.5Gbps
4 6 8 10
MODULATION CURRENT (mAP-P)
12
TRANSITION TIME
vs. DEEMPHASIS SETTING
41
PATTERN = 11110000,
39 DATA RATE = 8.5Gbps,
IMOD = 10mAP-P
37
35 FALL TIME
33
31
29
RISE TIME
27
25
0 1 2 3 4 5 6 7 8 9 10 11
SET_TXDE[3:0]
______________________________________________________________________________________ 11
11 Page |
Páginas | Total 35 Páginas | |
PDF Descargar | [ Datasheet MAX3798.PDF ] |
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