PDF AT91SAM9263 Data sheet ( Hoja de datos )

Número de pieza	AT91SAM9263
Descripción	Thumb Microcontrollers
Fabricantes	ATMEL Corporation
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No Preview Available ! www.DataSheet4U.com Features • Incorporates the ARM926EJ-S™ ARM® Thumb® Processor – DSP Instruction Extensions, Jazelle® Technology for Java® Acceleration – 16 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer – 220 MIPS at 200 MHz – Memory Management Unit – EmbeddedICE™, Debug Communication Channel Support – Mid-level Implementation Embedded Trace Macrocell™ • Bus Matrix – Nine 32-bit-layer Matrix, Allowing a Total of 28.8 Gbps of On-chip Bus Bandwidth – Boot Mode Select Option, Remap Command • Embedded Memories – One 128 Kbyte Internal ROM, Single-cycle Access at Maximum Bus Matrix Speed – One 80 Kbyte Internal SRAM, Single-cycle Access at Maximum Processor or Bus Matrix Speed – One 16 Kbyte Internal SRAM, Single-cycle Access at Maximum Bus Matrix Speed • Dual External Bus Interface (EBI0 and EBI1) – EBI0 Supports SDRAM, Static Memory, ECC-enabled NAND Flash and CompactFlash® – EBI1 Supports SDRAM, Static Memory and ECC-enabled NAND Flash • DMA Controller (DMAC) – Acts as one Bus Matrix Master – Embeds 2 Unidirectional Channels with Programmable Priority, Address Generation, Channel Buffering and Control • Twenty Peripheral DMA Controller Channels (PDC) • LCD Controller – Supports Passive or Active Displays – Up to 24 bits per Pixel in TFT Mode, Up to 16 bits per Pixel in STN Color Mode – Up to 16M Colors in TFT Mode, Resolution Up to 2048x2048, Supports Virtual Screen Buffers • 2D Graphics Accelerator – Line Draw, Block Transfer, Polygon Fill, Clipping, Commands Queuing • Image Sensor Interface – ITU-R BT. 601/656 External Interface, Programmable Frame Capture Rate – 12-bit Data Interface for Support of High Sensibility Sensors – SAV and EAV Synchronization, Preview Path with Scaler, YCbCr Format • USB 2.0 Full Speed (12 Mbits per second) Host Double Port – Dual On-chip Transceivers – Integrated FIFOs and Dedicated DMA Channels • USB 2.0 Full Speed (12 Mbits per second) Device Port – On-chip Transceiver, 2,432-byte Configurable Integrated DPRAM • Ethernet MAC 10/100 Base-T – Media Independent Interface or Reduced Media Independent Interface – 28-byte FIFOs and Dedicated DMA Channels for Receive and Transmit • Fully-featured System Controller, including – Reset Controller, Shutdown Controller – Twenty 32-bit Battery Backup Registers for a Total of 80 Bytes – Clock Generator and Power Management Controller – Advanced Interrupt Controller and Debug Unit AT91 ARM Thumb Microcontrollers AT91SAM9263 Preliminary 6249B–ATARM–14-Dec-06 1 page AT91SAM9263 Preliminary www.DataSheet4U.com 3. Signal Description Table 3-1 gives details on the signal name classified by peripheral. Table 3-1. Signal Description List Signal Name VDDIOM0 VDDIOM1 VDDIOP0 VDDIOP1 VDDBU VDDPLL VDDOSC VDDCORE GND GNDPLL GNDBU XIN XOUT XIN32 XOUT32 PLLRCA PLLRCB PCK0 - PCK3 SHDN Function Type Power Supplies EBI0 I/O Lines Power Supply Power EBI1 I/O Lines Power Supply Power Peripherals I/O Lines Power Supply Power Peripherals I/O Lines Power Supply Power Backup I/O Lines Power Supply Power PLL Power Supply Power Oscillator Power Supply Power Core Chip Power Supply Power Ground Ground PLL Ground Ground Backup Ground Ground Clocks, Oscillators and PLLs Main Oscillator Input Input Main Oscillator Output Output Slow Clock Oscillator Input Input Slow Clock Oscillator Output Output PLL A Filter Input PLL B Filter Input Programmable Clock Output Output Shutdown, Wakeup Logic Shutdown Control Output WKUP NTRST TCK TDI TDO TMS JTAGSEL RTCK Wake-up Input Test Reset Signal Test Clock Test Data In Test Data Out Test Mode Select JTAG Selection Return Test Clock Input ICE and JTAG Input Input Input Output Input Input Output Active Level Comments 1.65V to 3.6V 1.65V to 3.6V 2.7V to 3.6V 1.65V to 3.6V 1.08V to 1.32V 3.0V to 3.6V 3.0V to 3.6V 1.08V to 1.32V Driven at 0V only. Do not tie over VDDBU. Accepts between 0V and VDDBU. Low Pull-up resistor No pull-up resistor No pull-up resistor No pull-up resistor Pull-down resistor. Accepts between 0V and VDDBU. 6249B–ATARM–14-Dec-06 5 5 Page AT91SAM9263 Preliminary www.DataSheet4U.com 4.2 324-ball BGA Package Pinout Table 4-1. AT91SAM9263 Pinout for 324-ball BGA Package Pin Signal Name Pin Signal Name Pin A1 EBI0_D2 E10 PC31 K1 A2 EBI0_SDCKE E11 PC22 K2 A3 EBI0_NWE_NWR0 E12 PC15 K3 A4 EBI0_NCS1_SDCS E13 PC11 K4 A5 EBI0_A19 E14 PC4 K5 A6 EBI0_A11 E15 PB30 K6 A7 EBI0_A10 E16 PC0 K7 A8 EBI0_A5 E17 PB31 K8 A9 EBI0_A1_NBS2_NWR2 E18 HDPA K9 A10 PD4 F1 PD7 K10 A11 PC30 F2 EBI0_D13 K11 A12 PC26 F3 EBI0_D9 K12 A13 PC24 F4 EBI0_D11 K13 A14 PC19 F5 EBI0_D12 K14 A15 PC12 F6 EBI0_NCS0 K15 A16 VDDCORE F7 EBI0_A16_BA0 K16 A17 VDDIOP0 F8 EBI0_A12 K17 A18 DDP F9 EBI0_A6 K18 B1 EBI0_D4 F10 PD3 L1 B2 EBI0_NANDOE F11 PC27 L2 B3 EBI0_CAS F12 PC18 L3 B4 EBI0_RAS F13 PC13 L4 B5 EBI0_NBS3_NWR3 F14 PB26 L5 B6 EBI0_A22 F15 PB25 L6 B7 EBI0_A15 F16 PB29 L7 B8 EBI0_A7 F17 PB27 L8 B9 EBI0_A4 F18 HDMA L9 B10 PD0 G1 PD17 L10 B11 PC28 G2 PD12 L11 B12 PC21 G3 PD6 L12 B13 PC17 G4 EBI0_D14 L13 B14 PC9 G5 PD5 L14 B15 PC7 G6 PD8 L15 B16 PC5 G7 PD10 L16 B17 PB16 B18 DDM G8 GND G9 NC(1) L17 L18 C1 EBI0_D6 G10 GND M1 C2 EBI0_D0 G11 GND M2 C3 EBI0_NANDWE G12 GND M3 C4 EBI0_SDWE G13 PB21 M4 C5 EBI0_SDCK G14 PB20 M5 C6 EBI0_A21 G15 PB23 M6 C7 EBI0_A13 G16 PB28 M7 C8 EBI0_A8 G17 PB22 M8 C9 EBI0_A3 G18 PB18 M9 C10 PD2 H1 PD24 M10 C11 PC29 H2 PD13 M11 C12 PC23 H3 PD15 M12 C13 PC14 H4 PD9 M13 C14 PC8 H5 PD11 M14 Signal Name PE6 PD28 PE0 PE1 PD27 PD31 PD29 PD25 GND VDDIOM0 GND VDDIOM0 PB3/BMS PA14 PA15 PB1 PB0 PB2 PE10 PE4 PE9 PE7 PE5 PE2 PE3 VDDIOP1 VDDIOM1 VDDIOM0 VDDIOP0 GNDBU PA13 PB4 PA9 PA12 PA10 PA11 PE18 PE14 PE15 PE11 PE13 PE12 PE8 VDDBU EBI1_A21 VDDIOM1 GND GND VDDIOM1 PA6 Pin Signal Name P10 EBI1_NCS0 P11 EBI1_NWE_NWR0 P12 EBI1_D4 P13 EBI1_D10 P14 PA3 P15 PA2 P16 PE28 P17 TDI P18 PLLRCB R1 XOUT32 R2 TST R3 PA18 R4 PA25 R5 PA30 R6 EBI1_A2 R7 EBI1_A14 R8 EBI1_A13 R9 EBI1_A17_BA1 R10 EBI1_D1 R11 EBI1_D8 R12 EBI1_D12 R13 EBI1_D15 R14 PE26 R15 EBI1_SDCK R16 PE30 R17 TCK R18 XOUT T1 VDDOSC T2 VDDIOM1 T3 PA19 T4 PA21 T5 PA26 T6 PA31 T7 EBI1_A7 T8 EBI1_A12 T9 EBI1_A18 T10 EBI1_D0 T11 EBI1_D7 T12 EBI1_D14 T13 PE23 T14 PE25 T15 PE29 T16 PE31 T17 GNDPLL T18 XIN U1 PA17 U2 PA20 U3 PA23 U4 PA24 U5 PA28 6249B–ATARM–14-Dec-06 11 11 Page

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