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PDF LTC2485 Data sheet ( Hoja de datos )

Número de pieza LTC2485
Descripción 24-Bit ADC
Fabricantes Linear Technology 
Logotipo Linear Technology Logotipo



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LTC2485
24-Bit ∆Σ ADC with Easy Drive
Input Current Cancellation and I2C Interface
FEATURES
Easy Drive Technology Enables Rail-to-Rail Inputs
with Zero Differential Input Current
Directly Digitizes High Impedance Sensors with
Full Accuracy
www.DataSheetI4nUt.ecogmrated Temperature Sensor
GND to VCC Input/Reference Common Mode Range
2-Wire I2C Interface
Programmable 50Hz, 60Hz or Simultaneous
50Hz/60Hz Rejection Mode
2ppm (0.25LSB) INL, No Missing Codes
1ppm Offset and 15ppm Full-Scale Error
Selectable 2x Speed Mode
No Latency: Digital Filter Settles in a Single Cycle
Single Supply 2.7V to 5.5V Operation
Internal Oscillator
Six Addresses Available and One Global Address for
Synchronization
Available in a Tiny (3mm × 3mm) 10-Lead
DFN Package
U
APPLICATIO S
Direct Sensor Digitizer
Weight Scales
Direct Temperature Measurement
Strain Gauge Transducers
Instrumentation
Industrial Process Control
DVMs and Meters
DESCRIPTIO
The LTC®2485 combines a 24-bit plus sign No Latency∆ΣTM
analog-to-digital converter with patented Easy DriveTM tech-
nology and I2C digital interface. The patented sampling
scheme eliminates dynamic input current errors and the
shortcomings of on-chip buffering through automatic
cancellation of differential input current. This allows large
external source impedances and input signals, with rail-to-
rail input range to be directly digitized while maintaining
exceptional DC accuracy.
The LTC2485 includes on-chip temperature sensor and an
oscillator. The LTC2485 can be configured through an I2C
interface to measure an external signal or internal tem-
perature sensor and reject line frequencies. 50Hz, 60Hz or
simultaneous 50Hz/60Hz line frequency rejection can be
selected as well as a 2x speed-up mode.
The LTC2485 allows a wide common mode input range
(0V to VCC) independent of the reference voltage. The
reference can be as low as 100mV or can be tied directly
to VCC. The LTC2485 includes an on-chip trimmed oscil-
lator eliminating the need for external crystals or oscilla-
tors. Absolute accuracy and low drift are automatically
maintained through continuous, transparent, offset and
full-scale calibration.
TYPICAL APPLICATIO
VCC
1µF
10k
SENSE
10k
IDIFF = 0
1µF
REF+
VIN+
VCC
LTC2485
VIN–
GND
REF
SCL 2-WIRE
SDA I2C INTERFACE
CA0/F0
CA1
2485 TA01
6 ADDRESSES
+FS Error vs RSOURCE at IN+ and IN
80
VCC = 5V
60
40
VVVRIINNE+–F
=
=
=
5V
3.75V
1.25V
FO = GND
20 TA = 25°C
0
CIN = 1µF
–20
–40
–60
–80
1
10 100 1k 10k 100k
RSOURCE ()
2485 TA02
2485
1

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LTC2485 pdf
LTC2485
TI I G CHARACTERISTICS The denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
fEOSC
tHEO
tLEO
tCONV_1
External Oscillator Frequency Range
External Oscillator High Period
External Oscillator Low Period
Conversion Time for 1x Speed Mode
www.DataShteCeOtN4VU_2.com Conversion Time for 2x Speed Mode
50Hz Mode
60Hz Mode
Simultaneous 50Hz/60Hz Mode
External Oscillator (Note 10)
50Hz Mode
60Hz Mode
Simultaneous 50Hz/60Hz Mode
External Oscillator (Note 10)
10
0.125
0.125
157.2
131.0
144.1
78.7
65.6
72.2
4000
100
100
160.3
133.6
146.9
41036/fEOSC
80.3
66.9
73.6
20556/fEOSC
163.5
136.3
149.9
81.9
68.2
75.1
kHz
µs
µs
ms
ms
ms
ms
ms
ms
ms
ms
I2C
WU
TI I G
CHARACTERISTICS
The denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Notes 3, 15)
SYMBOL
fSCL
tHD(SDA)
tLOW
tHIGH
tSU(STA)
tHD(DAT)
tSU(DAT)
tr
tf
tSU(STO)
PARAMETER
CONDITIONS
SCL Clock Frequency
Hold Time (Repeated) START Condition
LOW Period of the SCL Clock Pin
HIGH Period of the SCL Clock Pin
Set-Up Time for a Repeated START Condition
Data Hold Time
Data Set-Up Time
Rise Time for Both SDA and SCL Signals (Note 14)
Fall Time for Both SDA and SCL Signals
(Note 14)
Set-Up Time for STOP Condition
MIN TYP MAX UNITS
0
400 kHz
0.6
µs
1.3
µs
0.6
µs
0.6
µs
0
0.9 µs
100
ns
20+0.1CB
20+0.1CB
0.6
300 ns
300 ns
µs
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: All voltage values are with respect to GND.
Note 3: VCC = 2.7V to 5.5V unless otherwise specified.
VREF = REF+ – REF, VREFCM = (REF+ + REF)/2, FS = 0.5VREF;
VIN = IN+ – IN, VINCM = (IN+ + IN)/2.
Note 4: Use internal conversion clock or external conversion clock source
with fEOSC = 307.2kHz unless otherwise specified.
Note 5: Guaranteed by design, not subject to test.
Note 6: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 7: 50Hz mode (internal oscillator) or fEOSC = 256kHz ±2% (external
oscillator).
Note 8: 60Hz mode (internal oscillator) or fEOSC = 307.2kHz ±2% (external
oscillator).
Note 9: Simultaneous 50Hz/60Hz mode (internal oscillator) or fEOSC =
280kHz ±2% (external oscillator).
Note 10: The external oscillator is connected to the CA0/F0 pin. The
external oscillator frequency, fEOSC, is expressed in kHz.
Note 11: The converter uses the internal oscillator.
Note 12: The output noise includes the contribution of the internal
calibration operations.
Note 13: Guaranteed by design and test correlation.
Note 14: CB = capacitance of one bus line in pF.
Note 15: All values refer to VIH(MIN) and VIL(MAX) levels.
2485
5

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LTC2485 arduino
LTC2485
PI FU CTIO S
REF+ (Pin 1), REF(Pin 3): Differential Reference Input.
The voltage on these pins can have any value between GND
and VCC as long as the reference positive input, REF+, is
more positive than the reference negative input, REF , by
at least 0.1V.
VCC (Pin 2): Positive Supply Voltage. Bypass to GND
(Pin 8) with a 1µF tantalum capacitor in parallel with 0.1µF
ceramic capacitor as close to the part as possible.
www.DataShIeNet+4U(P.cionm4), IN(Pin 5): Differential Analog Input. The
voltage on these pins can have any value between
GND – 0.3V and VCC + 0.3V. Within these limits the
converter bipolar input range (VIN = IN+ – IN) extends
from –0.5 • VREF to 0.5 • VREF. Outside this input range
the converter produces unique overrange and underrange
output codes.
SCL (Pin 6): Serial Clock Pin of the I2C Interface. The
LTC2485 can only act as a slave and the SCL pin only
accepts external serial clock. Data is shifted into the SDA
pin on the rising edges of the SCL clock and output
through the SDA pin on the falling edges of the
SCL clock.
SDA (Pin 7): Bidirectional Serial Data Line of the I2C
Interface. In the transmitter mode (Read), the conversion
result is output through the SDA pin, while in the receiver
mode (Write), the device configuration bits are input
through the SDA pin. At data input mode, the pin is high
impedance; while at data output mode, it is an open-drain
N-channel driver and therefore an external pull-up resistor
or current source to VCC is needed.
GND (Pin 8): Ground. Connect this pin to a ground plane
through a low impedance connection.
CA1 (Pin 9): Chip Address Control Pin. The CA1 pin is
configured as a three state (LOW, HIGH, or Floating)
address control bit for the device I2C address.
CA0/F0 (Pin 10): Chip Address Control Pin/External Clock
Input Pin. When no transition is detected on the CA0/F0
pin, it is a two state (HIGH or Floating) address control bit
for the device I2C address. When the pin is driven by an
external clock signal with a frequency fEOSC of at least
10kHz, the converter uses this signal as its system clock
and the fundamental digital filter rejection null is located at
a frequency fEOSC/5120 and sets the Chip Address CA0
internally to a HIGH.
W
FU CTIO AL BLOCK DIAGRA
REF+
1
IN+
4
IN
5
MUX
IN+ REF+
3RD ORDER
∆Σ ADC
IN
REF
2
VCC
I2C
SERIAL
INTERFACE
SCL
SDA
CA1
CA0/F0
6
7
9
10
TEMP
SENSOR
AUTOCALIBRATION
AND CONTROL
REF
3
GND
8
INTERNAL
OSCILLATOR
2485 FB
2485
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