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PDF AN504 Data sheet ( Hoja de datos )

Número de pieza AN504
Descripción Video Crosspoint Switch Simplifies Large Matrix Designs
Fabricantes Vishay Siliconix 
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AN504
Vishay Siliconix
Video Crosspoint Switch Simplifies Large Matrix Designs
The DG884 is a digitally selectable eight-input to four-output
monolithic bidirectional crosspoint IC suitable for wideband
analog and digital signal routing. Wideband here is used to
define signals with bandwidths in the range of 60 to 200 MHz.
www.DataSheFeta4bUr.iccoamted with the Vishay Siliconix D/CMOS technology, the
DG884 incorporates n-channel DMOS switching FETs with
low-power CMOS control logic, drivers, and latches. The
low-capacitance DMOS FETs are connected as low
on-resistance T-switches to achieve high levels of off-isolation
and low levels of crosstalk. On-chip TTL-compatible address
latches and data readback are included to simplify
microprocessor interfacing. Double buffering of the switch
addressing allows update information to be loaded without
affecting the existing state of the crosspoint. A single SALVO
command is all that is required to transfer previously set
information to the current event latches. This single command
significantly speeds up the setup time, especially in large
matrices requiring more than one DG884.
The Signal Path
The internal function blocks of the DG884 are shown in
Figure 1, and the signal path from one input to one output is
shown in Figure 2. The signal path is composed of a T-switch
at the matrix and an additional low-resistance switch in series
with each output. The T-switch connection maximizes the
off-isolation by shunting to ground any signal that feeds
through the small series capacitances of the off series
switches. The series output switches offer a number of
advantages, namely:
D They provide an extra stage of isolation at the output
D They reduce the off-state output capacitance, which is
necessary when other DG884 outputs are connected in
parallel.
D They reduce the off-output leakage.
IN1 IN2 IN3 IN4 IN5 IN6 IN7 IN8
8 x 4 Switch Matrix
Decode Logic, Switch Drivers
WR
CS I/O Control
B1 Logic
B0
Current Event Latches
Next Event Latches
I/O A3 A2 A1 A0
FIGURE 1. DG884 Block Diagram
Document Number: 70610
05-Aug-99
OUT1
OUT2
OUT3
OUT4
4 Disable Outputs
(Quad Package
Only)
RS
SALVO
Signal Path Input to Output
SW1 SW2
Input
1 of 8
SW3
SW4
Output
1 of 4
From Input 2 of 8
From Input 8 of 8
MUX Common
Typical on-resistances at 25_C:
SW1 = SW2 = 20 W
SW3 = 200 W
SW4 = 10 W
FIGURE 2. DG884 Signal Path
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AN504 pdf
AN504
Vishay Siliconix
Address Bus
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WR
8085
S1
A0 A1
A3 – A15
Decode
CS
B1
B0 DG884
WR
SALVO
RS
I/O A0 A3
D4 D5 D6
Data Bus
D3 D0
Data
Result
D7 D6 D5 D4 D3 D2 D1 D0 WR
X 0 0 0BBBB
Nothing; D4 = 0
X 0 0 1BBBB
4 -bit binary data written into one of four next event latches. The latch is
decided by status of B0 and B1 lines.
X 0 1 0XXXX
Salvo pulse – updates current event latches.
X 1 0 0XXXX
Reset or clear pulse resets all latches and sets all switches to open circuit.
FIGURE 7. 8085 Microprocessor Interface
Four-bit data to be written to or read from the DG884 is applied
to the A0 – A3 input lines. These inputs are connected to D0
D3 of the computer data bus. Three of the higher order data bus
lines, D4,5,6 (D7 is not used at all with the DG884), are used to
gate the WRITE pulse through to either the WRITE, RESET, or
SALVO inputs. The truth table gives the implementation of the
gating shown in the circuit diagram.
To read four-bit data from the DG884 (i.e., the current event
latch status), the I/O terminal is connected to the S1 output of
the 8085. This signal provides an advance Read/Write control
to the DG884. A read operation from the above four separate
memory locations will give the status of each current event
latch. Data being read from the DG884 will appear on the four
lower data lines, D0 – D3, of the computer data bus.
Differential Applications
Although the DG884 is a single-ended 8 x 4 crosspoint, it may
be used as a differential 4 x 2 crosspoint. Address A2 defines
inputs 1 - 4 or 5 - 8, while address B1 defines the outputs,
namely 1 and 2, or 3 and 4. A suitable wideband differential
amplifier (CLC410) at the output will provide common-mode
rejection of incoming signals and charge injection thanks to the
inherent path match within the crosspoint IC.
There is also a need for wideband two-input/output crosspoint
systems when dealing with S-VHS
Document Number: 70610
05-Aug-99
www.vishay.com S FaxBack 408-970-5600
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AN504 arduino
dc S1 R1
HP4195A
AN504
Vishay Siliconix
T2
www.DataSheet4U.com
dc
HP
41951A
25 W
DG884
IN OUT
Analyzer Set for S21 Measurement
FIGURE 17. Differential Gain and Phase
750 W
75 W
Signal Generator
PM5654
DG884
IN OUT
75 W
TF2910/4
MON
75 W
TRIG
Scope
FIGURE 18. Marconi TF2910/4 Setup
FIGURE 19. One Input to One Output
Document Number: 70610
05-Aug-99
FIGURE 20. One Input to Four Outputs
www.vishay.com S FaxBack 408-970-5600
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