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PDF CS4124 Data sheet ( Hoja de datos )
| Número de pieza | CS4124 | |
| Descripción | High Side PWM FET Controller | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de CS4124 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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CS4124
High Side PWM FET
Controller
The CS4124 is a monolithic integrated circuit designed primarily to
control the rotor speed of permanent magnet, direct current (DC)
brush motors. It drives the gate of an N channel power MOSFET or
IGBT with a user–adjustable, fixed frequency, variable duty cycle,
pulse width modulated (PWM) signal. The CS4124 can also be used to
control other loads such as incandescent bulbs and solenoids.
Inductive current from the motor or solenoid is recirculated through an
external diode.
The CS4124 accepts a DC level input signal of 0 to 5.0 V to control
the pulse width of the output signal. This signal can be generated by a
potentiometer referenced to the on–chip 5.0 V linear regulator, or a
filtered 0% to 100% PWM signal also referenced to the 5.0 V
regulator.
The IC is placed in a sleep state by pulling the CTL lead below 0.5 V.
In this mode everything on the chip is shutdown except for the on–chip
regulator and the overall current draw is less than 275 µA. There are a
number of on–chip diagnostics that look for potential failure modes
and can disable the external power MOSFET.
Features
• 150 mA Peak PWM Gate Drive Output
• Patented Voltage Compensation Circuit
• 100% Duty Cycle Capability
• 5.0 V, ± 3.0% Linear Regulator
• Low Current Sleep Mode
• Overvoltage Protection
• Boost Mode Power Supply
• Output Inhibit
http://onsemi.com
16
1
DIP–16
N SUFFIX
CASE 648
PIN CONNECTION AND
MARKING DIAGRAM
1
OUTPUT
BOOST
FLT
ROSC
COSC
CTL
PGND
VCC
16
GND
INH
IADJ
ISENSE+
ISENSE–
PMP
SNI
VREG
A
WL, L
YY, Y
WW, W
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION*
Device
Package
Shipping
CS4124YN16
DIP–16
25 Units/Rail
* Contact your local sales representative for 16-lead SOIC wide package.
© Semiconductor Components Industries, LLC, 2000
November, 2000 – Rev. 6
1
Publication Order Number:
CS4124/D
1 page  
CS4124
GND
VREG
VCC
PGND
CTL
5.0 V Regulator
Clamp
Overvoltage
+
_
S
Q
R
+
_
450 mV
VCC
+
_
+
_
Reset
Triangle
Oscillator
SQ
R
Current
Sense
Timer
Out In
+
_
+
_
2.5 V
PMP
SNI
OUTPUT
INH
ISENSE+
ISENSE–
IADJ
COSC
ROSC
FLT
Figure 2. Block Diagram
http://onsemi.com
5
5 Page 
Notes
CS4124
http://onsemi.com
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet CS4124.PDF ] | |
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