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PDF MAX9974 Data sheet ( Hoja de datos )

Número de pieza MAX9974
Descripción (MAX9973 / MAX9974) Dual Driver / Comparator / Load
Fabricantes Maxim Integrated Products　
Logotipo Maxim Integrated Products Logotipo



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No Preview Available ! MAX9974 Hoja de datos, Descripción, Manual

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19-0690; Rev 0; 1/07
Dual Driver/Comparator/Load
with Internal DACs
General Description
The MAX9973/MAX9974 fully integrated, high-perfor-
mance, dual-channel pin electronics driver/compara-
tor/load (DCL) with built-in level-setting digital-to-analog
converters (DACs) are ideally suited for memory and
SOC automatic test equipment (ATE) applications.
Each channel includes a three-level pin driver, a win-
dow comparator, dynamic clamps, a 1kΩ load, and
seven independent level-setting DACs.
The driver features a wide voltage range and high-speed
operation, includes high-impedance and active-termina-
tion (3rd-level drive) modes, and is highly linear even at
low voltage swings. Additionally, the driver provides high-
speed differential multiplexer control inputs, with internal
termination resistors that are compatible with ECL, LV-
PECL, LVDS, and GTL. The window comparators provide
extremely low timing variation over changes in slew rate,
pulse width, or overdrive voltage, and have open-collec-
tor outputs. When high-impedance mode is selected, the
dynamic clamps provide damping of high-speed device-
under-test (DUT) waveforms. The load facilitates fast con-
tact testing when used in conjunction with the
comparators, and functions as a pullup for
open-drain/collector DUT_ outputs. The MAX9973/
MAX9974 are configured through a serial interface.
The MAX9973/MAX9974 differ in two aspects: the posi-
tion of the exposed heat slug and the pin arrangement.
The MAX9973G/MAX9974G comparator outputs sink
8mA (typ), while the MAX9973H/MAX9974H compara-
tor outputs sink 16mA (typ). The devices are available
in a 64-pin (10mm x 10mm x 1.00mm) TQFP-EP pack-
age with an exposed paddle on top (MAX9973) or bot-
tom (MAX9974) for heat removal. Power dissipation is
only 700mW per channel. The full operating voltage
range is -1.5V to +6.5V. Operation is specified at an
internal die temperature of +40°C to +100°C, and fea-
tures a temperature monitor output.
Memory Testers
SOC Testers
Applications
Features
o 600Mbps at 3V High Speed
o 700mW per Channel Extremely Low Power
Dissipation
o -1.5V to +6.5V Wide Voltage Range
o 200mV to 8V Wide Voltage Swing Range
o 10nA (max) Low-Leakage Mode
o Integrated Termination On-the-Fly
(3rd-Level Drive)
o Integrated Voltage Clamps
o Passive Load or Pullup
o Very Low Timing Dispersion
o Minimal External Component Count
o SPITM-Compatible Serial Control Interface
Ordering Information
PART
PIN-PACKAGE
PKG
CODE
OUTPUT
SINK
CURRENT
MAX9973GCCB
64 TQFP-EP-IDP**
(10mm x 10mm x C64E-13R
1.00mm)
8mA
64 TQFP-EP-IDP**
MAX9973HCCB* (10mm x 10mm x C64E-13R
1.00mm)
16mA
64 TQFP-EP†
MAX9974GCCB* (10mm x 10mm x
1.00mm)
—
8mA
64 TQFP-EP†
MAX9974HCCB* (10mm x 10mm x
1.00mm)
—
16mA
Note: Devices are available in both leaded and lead-free
packages. Specify lead free by adding a + symbol at the end
of the part number when ordering.
*Future product—contact factory for availability.
**EP-IDP = Exposed paddle (inverted die paddle).
†EP = Exposed paddle.
SPI is a trademark of Motorola Inc.
Pin Configuration appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

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MAX9974 pdf
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Dual Driver/Comparator/Load
with Internal DACs
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +9.75V, VEE = -4.75V, VDD = 3.3V, VDHV_ = +3V, VDLV_ = 0, VDTV_ = +1.5V, SC1 = SC0 = 0, VCHV_ = +2.0V, VCLV_ = +1.0V,
VCPHV_ = +7.2V, VCPLV_ = -2.2V, VVTERM = VT_ = +1.8V, RT = 50Ω || 1pF, TJ = +70°C, unless otherwise noted. All temperature coefficients
are measured at TJ = +40°C to +100°C, unless otherwise noted.) (Note 1)
PARAMETER
Rise and Fall Time
Rise and Fall Time Matching
SYMBOL
CONDITIONS
0.2VP-P programmed, VDHV_ = 0.2V, VDLV_ = 0,
20% to 80%
1VP-P programmed, VDHV_ = 1V, VDLV_ = 0,
10% to 90%
3VP-P programmed, VDHV_ = 3V, VDLV_ = 0,
10% to 90%, trim condition
5VP-P programmed VDHV_ = 5V, VDLV_ = 0,
10% to 90%
0.2VP-P programmed, VDHV_ = 0.2V, VDLV_ = 0,
20% to 80%
1VP-P programmed, VDHV_ = 1V, VDLV_ = 0,
10% to 90%
3VP-P programmed, VDHV_ = 3V, VDLV_ = 0,
10% to 90
5VP-P programmed, VDHV_ = 5V, VDLV_ = 0,
10% to 90% (Note 2)
MIN
0.35
1.0
TYP
0.20
0.50
1.2
2.0
40
MAX UNITS
0.75
ns
1.5
150
ps
200
250
Slew Rate
Relative
to SC1 =
SC0 = 0
SC1 = 0, SC0 = 1, VDHV_ = 3V,
VDLV_ = 0, 20% to 80%
SC1 = 1, SC0 = 0, VDHV_ = 3V,
VDLV_ = 0, 20% to 80%
SC1 = 1, SC0 = 1, VDHV_ = 3V,
VDLV_ = 0, 20% to 80%
75
50
25
%
0.2VP-P programmed,
VDHV_ = 0.2V, VDLV_ = 0
0.4
Minimum Pulse Width (Note 13)
Positive or
negative
1VP-P programmed VDHV_ = 1V,
VDLV_ = 0 (Note 2)
3VP-P programmed VDHV_ = 3V,
VDLV_ = 0 (Note 2)
0.7 2
1.5 2.5
ns
Data Rate (Note 14)
Rise and Fall Time, Drive to Term
5VP-P programmed VDHV_ = 5V,
VDLV_ = 0 (Note 2)
0.2VP-P programmed, VDHV_ = 0.2V, VDLV_ = 0
1VP-P programmed, VDHV_ = 1V, VDLV_ = 0
3VP-P programmed, VDHV_ = 3V, VDLV_ = 0
5VP-P programmed, VDHV_ = 5V, VDLV_ = 0
VDHV_ = 3V, VDLV_ = 0, VDTV_ = 1.5V,
measured 10% to 90% of waveform
2.4 3.5
2900
1300
600
400
Mbps
1.6 ns
Rise and Fall Time, Term to Drive
VDHV_ = 3V, VDLV_ = 0, VDTV_ = 1.5V,
measured 10% to 90% of waveform
0.7 ns
_______________________________________________________________________________________ 5

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MAX9974 arduino
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Dual Driver/Comparator/Load
with Internal DACs
(TJ = +70°C, unless otherwise noted.)
Typical Operating Characteristics
DRIVER SMALL-
SIGNAL RESPONSE
VDLV_ = 0
RL = 50Ω
VDHV_ = 500mV
VDHV_ = 200mV
VDHV_ = 100mV
0
t = 2.0ns/div
DRIVER 1V TRAILING-EDGE TIMING
ERROR vs. PULSE WIDTH
50
40
30
20 NEGATIVE PULSE
10
0
-10
POSITIVE PULSE
-20
-30
-40 NORMALIZED AT PW = 12.5ns
PERIOD = 25ns, VDHV_ = +1V, VDLV_ = 0
-50
0 5 10 15 20
PULSE WIDTH (ns)
25
DRIVE TO HIGH
IMPEDANCE TRANSITION
DHV_ TO HIGH IMPEDANCE
0
DLV_ TO HIGH IMPEDANCE
RL = 50Ω
VDHV_ = +1V
VDLV_ = -1V
t = 2.0ns/div
DRIVER LARGE-
SIGNAL RESPONSE
VDLV_ = 0
RL = 50Ω
VDHV_ = 5V
VDHV_ = 3V
VDHV_ = 1V
0
t = 2.0ns/div
DRIVER TIME DELAY
vs. COMMON-MODE VOLTAGE
50
NORMALIZED AT VCM = +1.5V
40
30
FALLING EDGE
20
10
0
-10 RISING EDGE
-20
-1
012345
COMMON-MODE VOLTAGE (V)
6
DRIVER LINEARITY ERROR
vs. OUTPUT VOLTAGE
2.0
DUT_ = DHV_
1.5 VDLV_ = -1.5V
VDTV_ = 0
1.0
0.5
0
-0.5
-1.0
-1.5
-2.0
-1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5
VDUT_ (V)
DRIVER 3V TRAILING-EDGE TIMING
ERROR vs. PULSE WIDTH
80
60
40
NEGATIVE PULSE
20
0
-20 POSITIVE PULSE
-40 NORMALIZED AT PW = 12.5ns
PERIOD = 25ns, VDHV_ = +3V, VDLV_ = 0
-60
0 5 10 15 20
PULSE WIDTH (ns)
25
DRIVE TO TERM
TRANSITION
DHV_ TO DTV_
RL = 50Ω
VDHV_ = 3.0V
DLV_ TO DTV_ VDTV_ = 1.5V
VDLV_ = 0
0
t = 2.0ns/div
DRIVER LINEARITY ERROR
vs. OUTPUT VOLTAGE
2.0
DUT_ = DLV_
1.5 VDHV_ = +6.5V
VDTV_ = 0
1.0
0.5
0
-0.5
-1.0
-1.5
-2.0
-1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5
VDUT_ (V)
______________________________________________________________________________________ 11

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