|
|
PDF LM5101C Data sheet ( Hoja de datos )
| Número de pieza | LM5101C | |
| Descripción | (LM5100x / LM5101x) High Voltage High Side and Low Side Gate Drivers | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de LM5101C (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
November 2006
LM5100A/B/C
LM5101A/B/C
3A, 2A and 1A High Voltage High-Side and Low-Side
Gate Drivers
General Description
The LM5100A/B/C and LM5101A/B/C High Voltage Gate
Drivers are designed to drive both the high-side and the
low-side N-Channel MOSFETs in a synchronous buck or a
half-bridge configuration. The floating high-side driver is ca-
pable of operating with supply voltages up to 100V. The “A”
versions provide a full 3A of gate drive while the “B” and “C”
versions provide 2A and 1A respectively. The outputs are
independently controlled with CMOS input thresholds
(LM5100A/B/C) or TTL input thresholds (LM5101A/B/C). An
integrated high voltage diode is provided to charge the high-
side gate drive bootstrap capacitor. A robust level shifter
operates at high speed while consuming low power and
providing clean level transitions from the control logic to the
high-side gate driver. Under-voltage lockout is provided on
both the low-side and the high-side power rails. These de-
vices are available in the standard SOIC - 8 pin and the LLP
- 10 pin packages.
Features
n Drives both a high-side and low-side N-Channel
MOSFETs
n Independent high and low driver logic inputs
n Bootstrap supply voltage up to 118V DC
n Fast propagation times (25 ns typical)
n Drives 1000 pF load with 8 ns rise and fall times
n Excellent propagation delay matching (3 ns typical)
n Supply rail under-voltage lockout
n Low power consumption
n Pin compatible with HIP2100/HIP2101
Typical Applications
n Current Fed push-pull converters
n Half and Full Bridge power converters
n Synchronous buck converters
n Two switch forward power converters
n Forward with Active Clamp converters
Package
n SOIC-8
n LLP-10 (4 mm x 4 mm)
Simplified Block Diagram
FIGURE 1.
© 2006 National Semiconductor Corporation DS202031
DataSheet4 U .com
20203103
www.national.com
1 page  
www.DataSheet4U.com
Electrical Characteristics (Continued)
Limits in standard type are for TJ = 25˚C only; limits in boldface type apply over the junction temperature (TJ) range of -40˚C to
+125˚C. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent
the most likely parametric norm at TJ = 25˚C, and are provided for reference purposes only. Unless otherwise specified, VDD =
VHB = 12V, VSS = VHS = 0V, No Load on LO or HO (Note 4).
Symbol
Parameter
Conditions
Min Typ Max Units
LO & HO GATE DRIVER
VOH High-Level Output Voltage
LM5100A/LM5101A
High-Level Output Voltage
LM5100B/LM5101B
IHO = ILO = 100 mA
VOH = VDD– LO or
VOH = HB - HO
0.24
0.28
0.45
0.60
V
High-Level Output Voltage
LM5100C/LM5101C
0.60
1.10
IOHL Peak Pullup Current LM5100A/LM5101A
Peak Pullup Current LM5100B/LM5101B
HO, LO = 0V
3
2A
Peak Pullup Current LM5100C/LM5101C
1
IOLL Peak Pulldown Current LM5100A/LM5101A HO, LO = 12V
Peak Pulldown Current LM5100B/LM5101B
3
2A
Peak Pulldown Current LM5100C/LM5101C
1
THERMAL RESISTANCE
θJA Junction to Ambient
SOIC-8
LLP-10 (Note 3)
170
˚C/W
40
Switching Characteristics
Limits in standard type are for TJ = 25˚C only; limits in boldface type apply over the junction temperature (TJ) range of -40˚C to
+125˚C. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent
the most likely parametric norm at TJ = 25˚C, and are provided for reference purposes only. Unless otherwise specified, VDD =
VHB = 12V, VSS = VHS = 0V, No Load on LO or HO (Note 4).
Symbol
Parameter
Conditions
Min
Typ
Max
Units
tLPHL
LO Turn-Off Propagation Delay
LM5100A/B/C
LO Turn-Off Propagation Delay
LM5101A/B/C
LI Falling to LO Falling
20 45
ns
22 56
tLPLH
LO Turn-On Propagation Delay
LM5100A/B/C
LO Turn-On Propagation Delay
LM5101A/B/C
LI Rising to LO Rising
20 45
ns
26 56
tHPHL
HO Turn-Off Propagation Delay
LM5100A/B/C
HO Turn-Off Propagation Delay
LM5101A/B/C
HI Falling to HO Falling
20 45
ns
22 56
tHPLH
LO Turn-On Propagation Delay
LM5100A/B/C
LO Turn-On Propagation Delay
LM5101A/B/C
HI Rising to HO Rising
20 45
ns
26 56
tMON
Delay Matching: LO on & HO off
LM5100A/B/C
1 10 ns
Delay Matching: LO on & HO off
LM5101A/B/C
4 10
tMOFF
Delay Matching: LO off & HO on
LM5100A/B/C
Delay Matching: LO on & HO off
LM5101A/B/C
1 10
ns
4 10
tRC, tFC Either Output Rise/Fall Time
CL = 1000 pF
8 ns
5 www.national.com
DataSheet4 U .com
5 Page 
www.DataSheet4U.com
Timing Diagram
FIGURE 3.
20203104
Layout Considerations
The optimum performance of high and low-side gate drivers
cannot be achieved without taking due considerations during
circuit board layout. Following points are emphasized.
1. Low ESR / ESL capacitors must be connected close to
the IC, between VDD and VSS pins and between the HB
and HS pins to support the high peak currents being
drawn from VDD during turn-on of the external MOS-
FET.
2. To prevent large voltage transients at the drain of the top
MOSFET, a low ESR electrolytic capacitor must be con-
nected between MOSFET drain and ground (VSS).
3. In order to avoid large negative transients on the switch
node (HS pin), the parasitic inductances in the source of
top MOSFET and in the drain of the bottom MOSFET
(synchronous rectifier) must be minimized.
4. Grounding Considerations:
a) The first priority in designing grounding connections
is to confine the high peak currents that charge and
discharge the MOSFET gate into a minimal physical
area. This will decrease the loop inductance and mini-
mize noise issues on the gate terminal of the MOSFET.
The MOSFETs should be placed as close as possible to
the gate driver.
b) The second high current path includes the boot-
strap capacitor, the bootstrap diode, the local ground
referenced bypass capacitor and low-side MOSFET
body diode. The bootstrap capacitor is recharged on a
cycle-by-cycle basis through the bootstrap diode from
the ground referenced VDD bypass capacitor. The re-
charging occurs in a short time interval and involves high
peak current. Minimizing this loop length and area on the
circuit board is important to ensure reliable operation.
Power Dissipation Considerations
The total IC power dissipation is the sum of the gate driver
losses and the bootstrap diode losses. The gate driver
losses are related to the switching frequency (f), output load
capacitance on LO and HO (CL), and supply voltage (VDD)
and can be roughly calculated as:
PDGATES = 2 • f • CL • VDD2
There are some additional losses in the gate drivers due to
the internal CMOS stages used to buffer the LO and HO
outputs. The following plot shows the measured gate driver
power dissipation versus frequency and load capacitance. At
higher frequencies and load capacitance values, the power
dissipation is dominated by the power losses driving the
output loads and agrees well with the above equation. This
plot can be used to approximate the power losses due to the
gate drivers.
Gate Driver Power Dissipation (LO + HO)
VDD = 12V, Neglecting Diode Losses
20203105
The bootstrap diode power loss is the sum of the forward
bias power loss that occurs while charging the bootstrap
capacitor and the reverse bias power loss that occurs during
reverse recovery. Since each of these events happens once
per cycle, the diode power loss is proportional to frequency.
11 www.national.com
DataSheet4 U .com
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet LM5101C.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| LM5101 | High Voltage High Side and Low Side Gate Driver | National Semiconductor |
| LM5101 | LM5100/LM5101 High Voltage High Side and Low Side Gate Driver (Rev. C) |  Texas Instruments |
| LM5101 | High Voltage High Side and Low Side Gate Driver | National Semiconductor |
| LM5101A | LM5100A/B/C LM5101A/B/C 3-A 2-A and 1-A High-Voltage High-Side and Low-Side Gate Drivers (Rev. Q) | Texas Instruments |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |