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PDF LTC3548 Data sheet ( Hoja de datos )

Número de pieza LTC3548
Descripción Step-Down DC/DC Regulator
Fabricantes Linear Technology 
Logotipo Linear Technology Logotipo



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LTC3548
Dual Synchronous,
400mA/800mA, 2.25MHz
Step-Down DC/DC Regulator
FEATURES
High Efficiency: Up to 95%
Very Low Quiescent Current: Only 40µA
2.25MHz Constant Frequency Operation
High Switch Current: 0.7A and 1.2A
No Schottky Diodes Required
Low RDS(ON) Internal Switches: 0.35
Current Mode Operation for Excellent Line
and Load Transient Response
Short-Circuit Protected
Low Dropout Operation: 100% Duty Cycle
Ultralow Shutdown Current: IQ < 1µA
Output Voltages from 5V down to 0.6V
Power-On Reset Output
Externally Synchronizable Oscillator
Small Thermally Enhanced MSOP and 3mm × 3mm
DFN Packages
U
APPLICATIO S
PDAs/Palmtop PCs
Digital Cameras
Cellular Phones
Portable Media Players
PC Cards
Wireless and DSL Modems
DESCRIPTIO
The LTC®3548 is a dual, constant frequency, synchronous
step down DC/DC converter. Intended for low power
applications, it operates from 2.5V to 5.5V input voltage
range and has a constant 2.25MHz switching frequency,
allowing the use of tiny, low cost capacitors and inductors
with a profile 1.2mm. Each output voltage is adjustable
from 0.6V to 5V. Internal synchronous 0.35, 0.7A/1.2A
power switches provide high efficiency without the need
for external Schottky diodes.
A user selectable mode input is provided to allow the user
to trade-off noise ripple for low power efficiency. Burst
Mode® operation provides high efficiency at light loads,
while Pulse Skip Mode provides low noise ripple at light
loads.
To further maximize battery runtime, the P-channel
MOSFETs are turned on continuously in dropout (100%
duty cycle), and both channels draw a total quiescent
current of only 40µA. In shutdown, the device draws <1µA.
, LTC and LT are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Burst Mode is a registered
trademark of Linear Technology Corporation. Protected by U.S. Patents including 5481178,
6580258, 6304066, 6127815, 6498466, 6611131.
TYPICAL APPLICATIO
VIN = 2.8V
TO 5.5V
10µF
VOUT2 = 2.5V
AT 400mA
4.7µH
68pF
RUN2 VIN RUN1
MODE/SYNC
POR
LTC3548
SW2 SW1
100k
RESET
2.2µH
33pF
VOUT1 = 1.8V
AT 800mA
4.7µF
887k
280k
VFB2
GND
VFB1
604k
301k
10µF
Figure 1. 2.5V/1.8V at 400mA/800mA Step-Down Regulators
3548 TA01
LTC3548 Efficiency Curve
100 1000
95
90 EFFICIENCY
100
85
80
POWER LOSS
75
10
70
65
60
1
1
VIN = 3.3V, VOUT = 1.8V
Burst Mode OPERATION
CHANNEL 1, NO LOAD ON CHANNEL 2 0.1
10 100 1000
LOAD CURRENT (mA)
3548 TA02
3548f
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LTC3548 pdf
LTC3548
PI FU CTIO S
VFB1 (Pin 1): Output Feedback. Receives the feedback
voltage from the external resistive divider across the
output. Nominal voltage for this pin is 0.6V.
RUN1 (Pin 2): Regulator 1 Enable. Forcing this pin to VIN
enables regulator 1, while forcing it to GND causes regu-
lator 1 to shut down. This pin must be driven; do not float.
VIN (Pin 3): Main Power Supply. Must be closely decoupled
to GND.
SW1 (Pin 4): Regulator 1 Switch Node Connection to the
Inductor. This pin swings from VIN to GND.
GND (Pin 5): Main Ground. Connect to the (–) terminal of
COUT, and (–) terminal of CIN.
MODE/SYNC (Pin 6): Combination Mode Selection and
Oscillator Synchronization. This pin controls the operation
of the device. When tied to VIN or GND, Burst Mode
operation or pulse skipping mode is selected, respec-
tively. Do not float this pin. The oscillation frequency can
be synchronized to an external oscillator applied to this pin
and pulse skipping mode is automatically selected.
SW2 (Pin 7): Regulator 2 Switch Node Connection to the
Inductor. This pin swings from VIN to GND.
POR (Pin 8): Power-On Reset . This common-drain logic
output is pulled to GND when the output voltage falls
below –8.5% of regulation and goes high after 117ms
when both channels are within regulation.
RUN2 (Pin 9): Regulator 2 Enable. Forcing this pin to VIN
enables regulator 2, while forcing it to GND causes regu-
lator 2 to shut down. This pin must be driven; do not float.
VFB2 (Pin 10): Output Feedback. Receives the feedback
voltage from the external resistive divider across the
output. Nominal voltage for this pin is 0.6V.
Exposed Pad (GND) (Pin 11): Power Ground. Connect to
the (–) terminal of COUT, and (–) terminal of CIN. Must be
connected to electrical ground on PCB.
3548f
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LTC3548 arduino
LTC3548
APPLICATIO S I FOR ATIO
produce the most improvement. Percent efficiency can be
expressed as:
% Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, 4 main sources usually account for most of the
losses in LTC3548 circuits: 1)VIN quiescent current,
2) switching losses, 3) I2R losses, 4) other losses.
1) The VIN current is the DC supply current given in the
Electrical Characteristics which excludes MOSFET driver
and control currents. VIN current results in a small (<0.1%)
loss that increases with VIN, even at no load.
2) The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current results
from switching the gate capacitance of the power MOSFETs.
Each time a MOSFET gate is switched from low to high to
low again, a packet of charge dQ moves from VIN to
ground. The resulting dQ/dt is a current out of VIN that is
typically much larger than the DC bias current. In continu-
ous mode, IGATECHG = fO(QT + QB), where QT and QB are the
gate charges of the internal top and bottom MOSFET
switches. The gate charge losses are proportional to VIN
and thus their effects will be more pronounced at higher
supply voltages.
3) I2R losses are calculated from the DC resistances of the
internal switches, RSW, and external inductor, RL. In
continuous mode, the average output current flows through
inductor L, but is “chopped” between the internal top and
bottom switches. Thus, the series resistance looking into
the SW pin is a function of both top and bottom MOSFET
RDS(ON) and the duty cycle (D) as follows:
RSW = (RDS(ON)TOP)(D) + (RDS(ON)BOT)(1 – D)
The RDS(ON) for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
curves. Thus, to obtain I2R losses:
I2R losses = IOUT2(RSW + RL)
4) Other “hidden” losses such as copper trace and internal
battery resistances can account for additional efficiency
degradations in portable systems. It is very important to
include these “system” level losses in the design of a
system. The internal battery and fuse resistance losses
can be minimized by making sure that CIN has adequate
charge storage and very low ESR at the switching fre-
quency. Other losses including diode conduction losses
during dead-time and inductor core losses generally ac-
count for less than 2% total additional loss.
Thermal Considerations
In a majority of applications, the LTC3548 does not
dissipate much heat due to its high efficiency. However, in
applications where the LTC3548 is running at high ambi-
ent temperature with low supply voltage and high duty
cycles, such as in dropout, the heat dissipated may exceed
the maximum junction temperature of the part. If the
junction temperature reaches approximately 150°C, both
power switches will turn off and the SW node will become
high impedance.
To prevent the LTC3548 from exceeding the maximum
junction temperature, the user will need to do some
thermal analysis. The goal of the thermal analysis is to
determine whether the power dissipated exceeds the
maximum junction temperature of the part. The tempera-
ture rise is given by:
TRISE = PD θJA
where PD is the power dissipated by the regulator and θJA
is the thermal resistance from the junction of the die to the
ambient temperature.
The junction temperature, TJ, is given by:
TJ = TRISE + TAMBIENT
As an example, consider the case when the LTC3548 is in
dropout on both channels at an input voltage of 2.7V with
a load current of 400mA and 800mA and an ambient
temperature of 70°C. From the Typical Performance Char-
acteristics graph of Switch Resistance, the RDS(ON) resis-
tance of the main switch is 0.425. Therefore, power
dissipated by each channel is:
PD = I2 • RDS(ON) = 272mW and 68mW
The MS package junction-to-ambient thermal resistance,
θJA, is 45°C/W. Therefore, the junction temperature of the
3548f
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