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PDF LP38691 Data sheet ( Hoja de datos )
| Número de pieza | LP38691 | |
| Descripción | (LP38691 / LP38693) 500mA Low Dropout CMOS Linear Regulators Stable with Ceramic Output Capacitors | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LP38691 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
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PRELIMINARY
January 2005
LP38691/LP38693
500mA Low Dropout CMOS Linear Regulators
Stable with Ceramic Output Capacitors
General Description
The LP38691/3 low dropout CMOS linear regulators provide
tight output tolerance (2.0% typical), extremely low dropout
voltage (250 mV @ 500mA load current, VOUT = 5V), and
excellent AC performance utilizing ultra low ESR ceramic
output capacitors.
The low thermal resistance of the LLP, SOT-223 and T0-252
packages allow the full operating current to be used even in
high ambient temperature environments.
The use of a PMOS power transistor means that no DC base
drive current is required to bias it allowing ground pin current
to remain below 100 µA regardless of load current, input
voltage, or operating temperature.
Dropout Voltage: 250 mV (typ) @ 500mA (typ. 5V out).
Ground Pin Current: 55 µA (typ) at full load.
Precision Output Voltage: 2.0% (25˚C) accuracy.
Features
n 2.0% output accuracy (25˚C)
n Low dropout voltage: 250 mV @ 500mA (typ, 5V out)
n Wide input voltage range (2.7V to 10V)
n Precision (trimmed) bandgap reference
n Guaranteed specs for -40˚C to +125˚C
n 1µA off-state quiescent current
n Thermal overload protection
n Foldback current limiting
n T0-252, SOT-223 and 6-Lead LLP packages
n Enable pin (LP38693)
Applications
n Hard Disk Drives
n Notebook Computers
n Battery Powered Devices
n Portable Instrumentation
Typical Application Circuits
20126501
Note: * Minimum value required for stability.
**LLP package devices only.
20126502
© 2005 National Semiconductor Corporation DS201265
www.national.com
1 page  
Electrical Characteristics Limits in standard typeface are for TJ = 25˚C, and limits in boldface type apply
over the full operating temperature range. Unless otherwise specified: VIN = VOUT + 1V, CIN = COUT = 10 µF, ILOAD = 10mA.
Min/Max limits are guaranteed through testing, statistical correlation, or design. (Continued)
Symbol
en
VO (LEAK)
VEN
IEN
Parameter
Conditions
Output Noise
Output Leakage Current
Enable Voltage (LP38693 Only)
Enable Pin Leakage (LP38693
Only)
BW = 10Hz to 10kHz
VO = 3.3V
VO = VO(NOM) + 1V @ 10VIN
Output = OFF
Output = ON, VIN = 4V
Output = ON, VIN = 6V
Output = ON, VIN = 10V
VEN = 0V or 10V, VIN = 10V
TYP
MIN MAX
(Note 4)
Units
0.7 µV/
0.5 12
0.4
1.8
3.0
4.0
-1 0.001
1
µA
V
µA
Note 1: Absolute maximum ratings indicate limits beyond which damage to the component may occur. Operating ratings indicate conditions for which the device
is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications, see Electrical Characteristics. Specifications do not
apply when operating the device outside of its rated operating conditions.
Note 2: At elevated temperatures, device power dissipation must be derated based on package thermal resistance and heatsink values (if a heatsink is used). The
junction-to-ambient thermal resistance ( θJ-A) for the TO-252 is approximately 90˚C/W for a PC board mounting with the device soldered down to minimum copper
area (less than 0.1 square inch). If one square inch of copper is used as a heat dissipator for the TO-252, the θJ-A drops to approximately 50˚C/W. The SOT-223
package has a θJ-A of approximately 125˚C/W when soldered down to a minimum sized pattern (less than 0.1 square inch) and approximately 70˚C/W when soldered
to a copper area of one square inch. The θJ-A values for the LLP package are also dependent on trace area, copper thickness, and the number of thermal vias used
(refer to application note AN-1187). If power disspation causes the junction temperature to exceed specified limits, the device will go into thermal shutdown.
Note 3: ESD is tested using the human body model which is a 100pF capacitor discharged through a 1.5k resistor into each pin.
Note 4: Typical numbers represent the most likely parametric norm for 25˚C operation.
Note 5: If used in a dual-supply system where the regulator load is returned to a negative supply, the output pin must be diode clamped to ground.
Note 6: Output voltage line regulation is defined as the change in output voltage from nominal value resulting from a change in input voltage.
Note 7: Output voltage load regulation is defined as the change in output voltage from nominal value as the load current increases from 1mA to full load.
Note 8: Dropout voltage is defined as the minimum input to output differential required to maintain the output within 100mV of nominal value.
5 www.national.com
5 Page 
Typical Performance Characteristics Unless otherwise specified: TJ = 25˚C, CIN = COUT = 10 µF,
enable pin is tied to VIN (LP38693 only), VOUT = 1.8V, VIN = VOUT +1V, IL = 10mA. (Continued)
MIN VIN vs IOUT
Dropout Voltage vs IOUT
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20126556
11 www.national.com
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet LP38691.PDF ] | |
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