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PDF AM29LV800D Data sheet ( Hoja de datos )
| Número de pieza | AM29LV800D | |
| Descripción | EEPROM | |
| Fabricantes | Spansion LLC | |
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Am29LV800D
Data Sheet
For new designs, S29AL008D supersedes Am29LV800D and is the factory-recommended migration
path. Please refer to the S29AL008D Data Sheet for specifications and ordering information.
July 2003
The following document specifies Spansion memory products that are now offered by both Advanced
Micro Devices and Fujitsu. Although the document is marked with the name of the company that orig-
inally developed the specification, these products will be offered to customers of both AMD and
Fujitsu.
Continuity of Specifications
There is no change to this datasheet as a result of offering the device as a Spansion product. Any
changes that have been made are the result of normal datasheet improvement and are noted in the
document revision summary, where supported. Future routine revisions will occur when appropriate,
and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
AMD and Fujitsu continue to support existing part numbers beginning with “Am” and “MBM”. To order
these products, please use only the Ordering Part Numbers listed in this document.
For More Information
Please contact your local AMD or Fujitsu sales office for additional information about Spansion
memory solutions.
Publication Number Am29LV800D_00 Revision A Amendment 4 Issue Date January 21, 2005
1 page  
PRELIMINARY
Table Of Contents
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 5
Special Handling Instructions for FBGA Package .............. 7
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8
Standard Products ......................................................................8
Valid Combinations . . . . . . . . . . . . . . . . . . . . . . . . . 9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 10
Table 1. Am29LV800D Device Bus Operations .10
Word/Byte Configuration ...................................................... 10
Requirements for Reading Array Data ............................... 10
Writing Commands/Command Sequences .........................11
Program and Erase Operation Status ...................................11
Standby Mode ..............................................................................11
Automatic Sleep Mode ..............................................................11
RESET#: Hardware Reset Pin .................................................11
Output Disable Mode ...............................................................12
Table 2. Am29LV800DT Top Boot Block
Sector Addresses ........................................12
Table 3. Am29LV800DB Bottom Boot Block
Sector Addresses ........................................13
Autoselect Mode ........................................................................13
Table 4. Am29LV800D Autoselect Codes
(High Voltage Method) ................................14
Sector Protection/Unprotection .......................................... 14
Temporary Sector Unprotect ............................................... 14
Figure 1. Temporary Sector Unprotect
Operation .................................................. 15
Figure 2. In-System Sector Protect/
Sector Unprotect Algorithms ........................ 16
Hardware Data Protection .....................................................17
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 17
Reading Array Data ...................................................................17
Reset Command .........................................................................17
Autoselect Command Sequence .......................................... 18
Word/Byte Program Command Sequence ....................... 18
Figure 1. Program Operation ........................ 19
Chip Erase Command Sequence .......................................... 19
Sector Erase Command Sequence ...................................... 19
Erase Suspend/Erase Resume Commands ....................... 20
Figure 1. Erase Operation ............................ 21
Table 5. Am29LV800D Command Definitions ..21
Write Operation Status . . . . . . . . . . . . . . . . . . . . 22
DQ7: Data# Polling ..................................................................22
Figure 1. Data# Polling Algorithm ................. 23
RY/BY#: Ready/Busy# .............................................................23
DQ6: Toggle Bit I ......................................................................24
DQ2: Toggle Bit II .....................................................................24
Reading Toggle Bits DQ6/DQ2 ............................................24
DQ5: Exceeded Timing Limits ..............................................25
DQ3: Sector Erase Timer .......................................................25
Figure 1. Toggle Bit Algorithm ...................... 25
Table 6. Write Operation Status ....................26
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 27
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 27
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . .28
CMOS Compatible .................................................................. 28
Figure 1. ICC1 Current vs. Time (Showing Active
and Automatic Sleep Currents) .................... 29
Figure 1. Typical ICC1 vs. Frequency ............. 29
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Figure 1. Test Setup................................... 30
Table 7. Test Specifications ........................................30
Key to Switching Waveforms. . . . . . . . . . . . . . . . 30
Figure 1. Input Waveforms and
Measurement Levels................................... 30
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 31
Read Operations ........................................................................31
Figure 1. Read Operations Timings ............... 31
Hardware Reset (RESET#) ....................................................32
Figure 1. RESET# Timings........................... 32
Word/Byte Configuration (BYTE#) ..................................33
Figure 1. BYTE# Timings for Read
Operations ................................................ 34
Figure 1. BYTE# Timings for Write
Operations ................................................ 34
Erase/Program Operations ....................................................35
Figure 1. Program Operation Timings............ 36
Figure 1. Chip/Sector Erase Operation
Timings .................................................... 37
Figure 1. Data# Polling Timings (During
Embedded Algorithms) ............................... 38
Figure 1. Toggle Bit Timings (During
Embedded Algorithms) ............................... 38
Figure 1. DQ2 vs. DQ6 ............................... 39
Temporary Sector Unprotect ...............................................39
Figure 1. Temporary Sector Unprotect
Timing Diagram ......................................... 39
Figure 1. Sector Protect/Unprotect
Timing Diagram ......................................... 40
Alternate CE# Controlled
Erase/Program Operations .................................................... 41
Figure 1. Alternate CE# Controlled Write
Operation Timings...................................... 42
Erase and Programming Performance . . . . . . . . . 43
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 43
TSOP and SO Pin Capacitance . . . . . . . . . . . . . . 43
Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Physical Dimensions* . . . . . . . . . . . . . . . . . . . . . . .44
TS 048—48-Pin Standard TSOP ........................................ 44
TSR048—48-Pin Reverse TSOP .........................................45
FBB 048—48-Ball Fine-Pitch Ball Grid Array
(FBGA) 6 x 9 mm ................................................................... 46
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . 47
VBK 048 - 48 Ball Fine-Pitch Ball Grid Array
(FBGA) 6.15 x 8.15 mm .............................................................47
SO 044—44-Pin Small Outline Package .......................... 48
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . .49
January 21, 2005 Am29LV800D_00_A4_E
Am29LV800D
3
5 Page 
PRELIMINARY
Valid Combinations for FBGA Packages
Order Number
Package Marking
AM29LV800DT-70,
AM29LV800DB-70
WBC
WBI
WBD
WBF
WCC
WCI
WCD
WCF
L800DT70V,
L800DB70V
AM29LV800DT-90,
AM29LV800DB-90
WCC
WCI
WCD
WCF
WBC
WBI
WBD
WBF
L800DT90V,
L800DB90V
C, I,
D,F
AM29LV800DT-120,
AM29LV800DB-120
WBC
WBI
WBD
WBF
L800DT12V,
L800DB12V
Valid Combinations
Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD
sales office to confirm availability of specific valid combinations and to check on newly released combinations.
January 21, 2005 Am29LV800D_00_A4_E
Am29LV800D
9
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AM29LV800D.PDF ] | |
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