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PDF MSM6636 Data sheet ( Hoja de datos )

Número de pieza MSM6636
Descripción SAE-J1850 Communication Protocol Conformity Transmission Controller for Automotive LAN
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¡¡SemicondSucetormiconductor
MSM6636
MSM6636
SAE-J1850 Communication Protocol Conformity Transmission Controller for Automo-
tive LAN
GENERAL DESCRIPTION
The MSM6636 is a transmission controller for automotive LAN based on data communication
protocol SAE-J1850. This LSI can realize a data bus topology bus LAN system with a PWM bit
encoding method (41.6 K bps). In addition to a protocol control circuit, MSM6636 has an enclosed
quartz oscillation circuit, host CPU interface (clock synchronous serial / UART), a transmit/
receive buffer, and a bus receiver circuit that decreases the burden on the host CPU.
FEATURES
• Based on SAE-J1850 CLASS B DATA COMMUNICATION NETWORK INTERFACE (issued
August 12, 1991)
• CSMA/CD (Carrier-sense multiple access with collision detection)
• Internal transmit buffer (1 frame) and receive buffer (2 frames)
• Bit encoding: PWM (Pulse Width Modulation)
• Transmission Speed: 41.6K bps
• Multi-address setting with physical addressing: 1 type / functional addressing: 15 types
• Address filter function by multi-addressing (broadcasting possible)
• Automatic retransmission function by arbitration loss and non ACK
• 3 types of in-frame response support:
q Single-byte response from a single recipient
w Multi-byte response from a single recipient (with CRC code)
e Single-byte response from multiple recipients (ID response as ACK)
• Error detection by cyclic redundancy check (CRC)
• Various communication error detections
• Dual-wire bus abnormality detection by internal bus receiver and fault tolerance function
• Host CPU interface is LSB first / serial, 4 modes supported
q Clock synchronous serial (no parity)
Normal mode: 8-bit data
MPC Mode: 8-bit data + MPC bit (1: address / 0: data select bit)
w UART (yes/no parity selectable)
Normal mode: 1 start bit + 8-bit data + (parity) + 1 stop bit
MPC mode: 1 start bit + 8-bit data + MPC bit + (parity) + 1 stop bit
• Sleep Function
Low current consumption mode by oscillation stop (IDS Max < 50µA)
SLEEP / WAKE UP control from host CPU, WAKE UP via LAN bus
• Available package 18pin DIP, 18 pin QFJ (PLCC) and 24pin SOP.
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MSM6636 pdf
¡ Semiconductor
MSM6636
OPERATION RANGE
Parameter
Power Supply Voltage
Operating Frequency
Operating Temperature
Symbol
DVDD, AVDD
fOSC
Ta
Condition
AVDD = DVDD
DVDD = AVDD = 5V±10%
DGND = AGND = 0V
Rated Value Unit
4.5~5.5
V
2~16
MHz
-40~+125
°C
ELECTRICAL CHARACTERISTICS
DC Characteristics
DVDD = AVDD = 5V±10%, DGND = AGND = 0V, Ta = -40 ~ +125°C
Parameter
H Level Input Voltage
L Level Input Voltage
H Level Input Voltage
L Level Input Voltage
Receiver Hysteresis Width
H Level Input Current
L Level Input Current
H Level Input Current
L Level Input Current
H Level Input Current
L Level Input Current
H Level Output Voltage
L Level Output Voltage
H Level Output Voltage
L Level Output Voltage
GND Offset Voltage
Current Consumption 1
Current Consumption 2
Symbol Condition Application MIN TYP MAX Unit
VIH1
A DVDD ¥ 0.8 — DVDD + 0.3 V
VIL1
A DGND - 0.3 — DVDD ¥ 0.2 V
VIH2
F DVDD - 2.0 — DVDD + 1.0 V
VIL2
F DGND - 1.0 — DGND + 2.0 V
VH
F 100 — 400 mV
IIH1 VI = VDD
B
— — + 1 µA
IIL1 VI = 0V
B
— — - 1 µA
IIH2 VI = VDD
C
— — + 1 µA
IIL2 VI = 0V
C
— — - 100 µA
IIH3 VI = VDD
BI (+)
— — + 100 µA
IIL3 VI = 0V
BI (-)
— — - 100 µA
VOH1 IO = -400µA D DVDD - 0.4 — — V
VOL1 IO = +3.2mA
D
— — DGND + 0.4 V
VOH2 IO = -4.0mA E DVDD - 0.4 — — V
VOL2 IO = +4.0mA
E
— — DGND + 0.4 V
VOFF
— — — ±1 V
IDS During sleep
— — 50 µA
f = 16MHz,
IDD no load
— — 10 mA
A: RES, SCLK/PAE, RXD, U-C, M-N, A-D, OSC0
B: SCLK/PAE, RXD, U-C, M-N, A-D
C: RES
D: TXD, INT
E: BO-, BO+
F: BI-, BI+
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MSM6636 arduino
¡ Semiconductor
MSM6636
APPLICATION EXAMPLE
Host CPU and LAN bus Connection Example
Host CPU and LAN bus connection example of MSM6636 is shown below.
Host CPU
SOUT
SIN
INT
CLKOUT
RES
MSM6636
OPEN
DVDD AVDD
RXD
TXD BO (+)
INT
OSC0
OSC1
BI (+)
SCLK / PAE
BI (-)
U-C
M-N
BO (-)
A-D
RES DGND AGND
Unit A
ZD
ZD
Unit B
..
.
Bus + Bus -
The above connection example is when "UART, MPC and parity no mode" was used as the
"host CPU interface, and when CLKOUT output of the host CPU" was used as the clock for
MSM6636.
Depending on the control target, an optimum host CPU (number of ports, A/D converter yes
/ no) can be selected, and an optimum system can be constructed.
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