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Número de pieza | M6242B | |
Descripción | MSM6242B | |
Fabricantes | OKI | |
Logotipo | ||
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MSM6242B
MSM6242B
DIRECT BUS CONNECTED CMOS REAL TIME CLOCK/CALENDAR
DESCRIPTION
The MSM6242B is a silicon gate CMOS Real
Time Clock/Calendar for use in direct bus-
connection Microprocessor/Microcomputer
applications. An on-chip 32.768 KHz crystal
oscillator time base is divided to provide ad-
dressable 4-bit I/O data for SECONDS,
MINUTES, HOURS, DAY OF WEEK, DATE,
MONTH and YEAR. Data access is controlled
by 4-bit address, chip selects (CSO, CS1),
WRITE, READ, and ALE. Control Registers
www.DataShDe,etE4Ua.ncodmF provide for 30 SECOND error
adjustment, INTERRUPT REQUEST (IRQ
FLAG) and BUSY status bits, clock STOP,
HOLD, and RESET FLAG bits, 4 selectable
INTERRUPTS rates are available at the STD.P
(STANDARD PULSE) output utilizing Con-
trol Register inputs T0, T1 and the ITRPT/
STND (INTERRUPT/STANDARD). Mask-
ing of the interrupt output (STD.P) can be
accomplished via the MASK bit. The
MSM6242B can operate in a 12/24 hour for-
mat and Leap Year timing is automatic.
The MSM6242B normally operates from a 5V
±10% supply at –40 to 85°C. Battery backup
operation down to 2.0V allows continuation
of time keeping when main power is off. The
MSM6242B is offered in a 18-pin plastic DIP
and a 24-pin plastic Small Outline package.
FEATURES
DIRECT MICROPROCESSOR/MICROCONTROLLER BUS CONNECTION
TIME
MONTH DATE YEAR
DAY OF WEEK
23:59:59
12 31 80
7
• 4-bit data bus
• 4-bit address bus
• READ, WRITE, ALE and CHIP SELECT
INPUTS
• Status registers – IRQ and BUSY
• Selectable interrupt outputs – 1/64
second, 1 second, 1 minute, 1 hour
• Interrupt masking
• 32.768 KHz crystal controlled operation
• 12/24 hour format
• Auto leap year
• ±30 second error correction
• Single 5V supply
• Battery backup down to VDD = 2.0V
• Low power dissipation:
20µW max at VDD = 2V
150µW max at VDD = 5V
• 18 pin Plastic DIP (DIP18-P-300)
• 24 Pin-V Plastic SOP (SOP24-P-430-VK)
23
1 page ¡ Semiconductor
ABSOLUTE MAXIMUM RATINGS
Parameter
Power Supply Voltage
Input Voltage
Output Voltage
Storage Temperature
Symbol
VDD
VI
VO
TSTG
Condition
Ta = 25°C
MSM6242B
Rating
-0. 3 to 7
-0.3 to VDD +0.3
-0.3 to VDD +0.3
-55 to +150
Unit
V
V
V
°C
OPERATING CONDITIONS
Parameter
Power Supply Voltage
www.DataSheeSt4taUn.dcboymSupply Voltage
Crystal Frequency
Operating Temperature
Symbol
VDD
VBAK
f(XT)
TOP
Condition
—
—
—
—
Rating
4 to 6
2 to 6
32.768
-40 to +85
Unit
V
kHz
°C
D.C. Characteristics
Parameter Symbol
"H" Input Voltage
"L" Input Voltage
VIH1
VIL1
Condition
—
—
Min.
2.2
—
Typ.
—
—
Input Leak Current ILK1
VI = VDD/0V
—
Input Leak Current
"L" Output Voltage
"H" Output Voltage
"L" Output Voltage
ILK2
VOL1
VOH
VOL2
OFF Leak Current IOFFLK
Input Capacitance CI
Current Con-
sumption
Current Con-
sumption
"H" Input Voltage
"L" Input Voltage
IDD1
IDD2
VIH2
VIL2
IOL = 2.5mA
IOH = -400µA
IOL = 2.5mA
V = VDD/0V
Input frequency
1MHz
f(xt) =
32.768
KHz
CS1 ~~ 0
VDD =
5V
VDD =
2V
VDD = 2 ~ 5.5V
—
—
2.4
—
—
—
—
—
4/5VDD
—
—
—
—
—
—
—
5
—
—
—
—
(VDD = 5V ± 10%, TA = -40 ~ +85)
Applicable
Max. Unit
Terminal
— V All input termin-
0.8 als except CS1, XT
Input terminals
1/-1 other than
µA D0 ~ D3, XT
10/-10
0.4
—
0.4
10
—
V
V
µA
PF
30
µA
10
D0 ~ D3
D0 ~ D3
STD.P
All input
terminals
VDD
—
1/5VDD
V
CS1
27
5 Page ¡ Semiconductor
MSM6242B
Reading Method 2 when Not Using HOLD Bit
t1 *1
t0 *2
ITRPT/STNT
MASK
1
0
IRQ FLAG 0
Initialization only at power ON
• *1 and *2 represent the minimum required
time out.
For example
t1 = 0 and tO = 1 when required to a
unit of second;
t1 = 1 and tO = 0 when required to a
unit of minute; and
t1 = 1 and tO = 1 when required to a
unit of hour;
See Note
below
WAIT t
TIME DATA READ
REGISTER CD READ
Retried the reading, since a
carry occurred during the
operation.
IRQ FLAG = 0
www.DataSheet4U.com
YES
Normal read
NO
(Note)
Do this process within the following
time requirements by combination
between t1 and t0:
t1 = 0 and tO = 1 . . . Less than 1 second
t1 = 1 and tO = 0 . . . Less than 1 minute
t1 = 1 and tO = 1 . . . Less than 1 hour
t : 12 HOUR MODE . . . 35µS
24 HOUR MODE . . . 3µS
Reading Method 3 when Not Using HOLD Bit
Initialization only at power ON
• *1 and *2 represent the minimum required
t1 *1
t0 *2
ITRPT/STNT
MASK
1
0
time unit.
For example
t1 = 0 and tO = 1 when required to a
unit of second;
t1 = 1 and tO = 0 when required to a
CPU senses the unit of minute; and
interruption. t1 = 1 and tO = 1 when required to a
unit of hour;
REGISTER CD READ
IRQ FLAG = 1
YES
WAIT t
NO
The other IC causes
the interruption.
The interruption is caused by
this IC due to the occurrence
of a carry.
TIME DATA READ
IRQ FLAG 0
The IRQ FLAG is cleared to
read the next time data.
END
CD REGISTER (Control D Register)
a) HOLD (D0) –
Setting this bit to a "1" inhibits the 1Hz clock to the S1 counter, at which
time the Busy status bit can be read. When Busy = 0, register's S1 ~ W
can be read or written. During this procedure if a carry occurs the S1
counter will be incremented by 1 second after HOLD = 0 (this condition
is guaranteed as long as HOLD = 1 does not exceed 1 second in
duration). If CS1 = 0 then HOLD = 0 irrespective of any condition.
b) BUSY (D1) –
Status bit which shows the interface condition with microcontroller/
microprocessors. As for the method of writing into and reading from
S1 ~ W (address φ ~ C), refer to the flow chart described in Figure 10.
c) IRQ FLAG (D2) – This status bit corresponds to the output level of the STD.P output.
When STD.P = 0, then IRQ = 1; when STD.P = 1, then IRQ = 0. The IRQ
FLAG indicates that an interrupt has occurred to the microcomputer if
IRQ = 1. When D0 of register CE (MASK) = 0, then the STD.P output
changes according to the timing set by D3 (t1) and D2 (t0) of register E.
When D1 of register E (ITRPT/STND) = 1 (interrupt mode), the STD.P
output remains low until the IRQ FLAG is written to a "0". When IRQ
= 1 and timing for a new interrupt occurs, the new interrupt is ignored.
When ITRPT/STND = 0 (Standard Pulse Output mode) the STD.P
output remains low until either "0" is written to the IRQ FLAG;
otherwise, the IRQ FLAG automatically goes to "0" after 7.8125ms.
When writing the HOLD or 30 second adjust bits of register D, it is
necessary to write the IRQ FLAG bit to a "1".
d) ±30 ADJ (D3) – When 30-second adjustment is necessary, a "1" is written to bit D3
during which time the internal clock registers should not be read from
or written to 125µs after bit D3 = 1 it will automatically return to a "0",
and at that time reading or writing of registers can occur.
33
11 Page |
Páginas | Total 18 Páginas | |
PDF Descargar | [ Datasheet M6242B.PDF ] |
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