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PDF HY6264A Data sheet ( Hoja de datos )
| Número de pieza | HY6264A | |
| Descripción | Ic-64k CMOS SRAM | |
| Fabricantes | Hyundai | |
| Logotipo |  |
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HY6264A Series
8Kx8bit CMOS SRAM
DESCRIPTION
The HY6264A is a high-speed, low power and
8,192x8-bits CMOS static RAM fabricated using
Hyundai's high performance twin tub CMOS
process technology. This high reliability process
coupled with innovative circuit design techniques,
yields maximum access time of 70ns. The
HY6264A has a data retention mode that
guarantees data to remain valid at the minimum
power supply voltage of 2.0 volt. Using the CMOS
technology, supply voltage from 2.0 to 5.5 volt
has little effect on supply current in the data
retention mode. Reducing the supply voltage to
minimize current drain is unnecessary for the
HY6264A Series.
FEATURES
• Fully static operation and Tri-state outputs
• TTL compatible inputs and outputs
• Low power consumption
• Battery backup(L/LL-part)
-2.0V(min.) data retention
• Standard pin configuration
-28 pin 600 mil PDIP
-28 pin 330 mil SOP
Product Voltage Speed
No. (V) (ns)
HY6264A
5.0 70/85/100
Note 1. Current value is max.
Operation
Current(mA)
50
Standby Current(uA)
L LL
1mA 100
10
Temperature
(°C)
0~70(Normal)
PIN CONNECTION
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
Vcc
/WE
CS2
A8
A9
A11
/OE
NC
A12
A7
A6
A5
A4
A3
21 A10 A2
1
2
3
4
5
6
7
8
20 /CS1 A1 9
19
18
17
16
15
I/O8 A0
I/O7 I/O1
I/O6
I/O5
I/O4
I/O2
I/O3
Vss
10
11
12
13
14
28 Vcc
27 /WE
26 CS2
25 A8
24
23
A9
A11
22
21
/OE
A10
20 /CS1
19 I/O8
18 I/O7
17 I/O6
16 I/O5
15 I/O4
PDIP
SOP
BLOCK DIAGRAM
A0 ROW DECODER
A12
/CS1
CS2
/OE
/WE
MEMORY ARRAY
128x512
I/O1
I/O8
PIN DESCRIPTION
Pin Name
/CS1
CS2
/WE
/OE
A0-A12
Pin Function
Chip Select 1
Chip Select 2
Write Enable
Output Enable
Address Inputs
Pin Name
I/O1-I/O8
Vcc
Vss
NC
Pin Function
Data Input/Output
Power(+5V)
Ground
No Connect
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.02 /Jan.99
Hyundai Semiconductor
1 page  
HY6264A Series
Note(READ CYCLE):
1.tCHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions
and are not referenced to output voltage levels.
2.At any given temperature and voltage condition, tCHZ max. is less than tCLZ min. both for a given
device and from device to device.
3./WE is high for the read cycle.
READ CYCLE 2(Note 1,2,3)
ADDR
Data
Out
tAA
tOH
Previous Data
tRC
Note(Read Cycle)
1./WE is high for the read cycle.
2.Device is continuously selected /CS=VIL, CS2=VIH.
3./OE=VIL.
WRITE CYCLE 1(/WE Controlled)
ADDR
CS1
tWC
tAW
tCW
Data Valid
tOH
tWR(2)
CS2
WE
Data In
Data
Out
tAS tWP
tOHZ
Data Undefined
tDW
tDH
Data Valid
tOW
High-Z
Rev.02 /Jan.99
5
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet HY6264A.PDF ] | |
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