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PDF MAX1843 Data sheet ( Hoja de datos )

Número de pieza MAX1843
Descripción 2.7A / 1MHz / Low-Voltage / Step-Down Regulator with Internal Synchronous Rectification in QFN Package
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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No Preview Available ! MAX1843 Hoja de datos, Descripción, Manual

19-1986; Rev 1; 3/02
EVALUATION KIT
AVAILABLE
2.7A, 1MHz, Low-Voltage, Step-Down Regulator with
Internal Synchronous Rectification in QFN Package
General Description
The MAX1843 constant-off-time, pulse-width modulated
(PWM) step-down DC-DC converter is ideal for use in 5V
and 3.3V to low-voltage conversion necessary in note-
book and subnotebook computers. This device features
an internal PMOS power switch and internal synchronous
rectification for high efficiency and reduced component
count. An external Schottky diode is not required. The
internal 90mpower switch and 70mNMOS synchro-
nous-rectifier switch easily deliver continuous load cur-
rents up to 2.7A. The MAX1843 produces a preset +2.5V,
+1.8V, or +1.5V output voltage or an adjustable output
from +1.1V to VIN. It achieves efficiencies as high as
95%.
The MAX1843 uses a unique current-mode, constant-off-
time, PWM control scheme, which includes Idle Mode™
to maintain high efficiency during light-load operation.
The programmable constant-off-time architecture sets
switching frequencies up to 1MHz, allowing the user to
optimize performance trade-offs between efficiency, out-
put switching noise, component size, and cost. The
MAX1843 features an adjustable soft-start to limit surge
currents during startup, a 100% duty-cycle mode for low
dropout operation, and a low-power shutdown mode that
disconnects the input from the output and reduces sup-
ply current below 1µA. The MAX1843 is available in a 28-
pin QFN package with an exposed backside pad.
Applications
5V or 3.3V to Low-Voltage Conversion
CPU I/O Ring
Chipset Supplies
Notebook and Subnotebook Computers
Typical Configuration
INPUT
+3V TO
+5.5V
10
2.2µF
470pF
IN LX
MAX1843 FB
VCC
SHDN
COMP
TOFF
PGND
GND
FBSEL
REF
SS
OUTPUT
+1.1V TO
VIN
0.01µF
1µF
Idle Mode is a trademark of Maxim Integrated Products.
Features
o ±1% Output Accuracy
o Up to 1MHz Switching Frequency
o 95% Efficiency
o Internal PMOS/NMOS Switches
90m/70mOn-Resistance at VIN = +4.5V
110m/80mOn-Resistance at VIN = +3V
o Output Voltage
+2.5V, +1.8V, or +1.5V Pin Selectable
+1.1V to VIN Adjustable
o +3V to +5.5V Input Voltage Range
o 350µA Operating Supply Current
o <1µA Shutdown Supply Current
o Programmable Constant-Off-Time Operation
o Idle Mode Operation at Light Loads
o Thermal Shutdown
o Adjustable Soft-Start Inrush Current Limiting
o 100% Duty Cycle During Low-Dropout Operation
o Output Short-Circuit Protection
o 28-Pin QFN Package
PART
MAX1843EGI
Ordering Information
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
28 QFN
Pin Configuration
TOP VIEW
28 27
N.C. 1
26 25
24 23
22
21 PGND
IN 2
20 PGND
LX 3
19 LX
IN 4
N.C. 5
MAX1843
18 LX
17 PGND
SS 6
16 VCC
COMP 7
15 FBSEL
8 9 10 11 12 13 14
QFN
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

1 page




MAX1843 pdf
2.7A, 1MHz, Low-Voltage, Step-Down Regulator with
Internal Synchronous Rectification in QFN Package
Typical Operating Characteristics (continued)
(Circuit of Figure 1, TA = +25°C, unless otherwise noted.)
500
450
400
350
300
250
200
150
100
50
0
0
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
100MAX1843 toc01
NO LOAD
90
80
70
60
50
40
30
SHUTDOWN
20
10
0
123456
VIN (V)
OFF-TIME vs. RTOFF
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0 50 100 150 200 250 300 350 400 450 500
RTOFF (k)
SWITCHING FREQUENCY
vs. OUTPUT CURRENT
1200
VIN = +5V, VOUT = +2.5V, L = 2.5µH
1000
800
600
VIN = +3.3V, VOUT = +1.5V, L = 1.5µH
400
VIN = +5V, VOUT = +1.5V, L = 2.5µH
200
0
0 0.5 1.0 1.5 2.0 2.5 3.0
OUTPUT CURRENT (A)
STARTUP AND SHUTDOWN
MAX1843 toc08
IINPUT
0 1A/div
1ms/div
ROUT = 0.5, RTOFF = 56k
VIN = +3.3V, VOUT = +1.5V
VSHDN
0 5V/div
VOUTPUT
0 1V/div
VSS
0 2V/div
LOAD-TRANSIENT RESPONSE
MAX1843 toc09
LINE-TRANSIENT RESPONSE
MAX1843 toc10
VINPUT
2V/div
VOUTPUT
50mV/div
0
IL
2A/div
VOUTPUT
20mV/div
AC-COUPLED
10µs/div
20µs/div
IOUT = 2.5A, VOUT = +1.5V
RTOFF = 100k, L = 2.2µH
_______________________________________________________________________________________ 5

5 Page





MAX1843 arduino
2.7A, 1MHz, Low-Voltage, Step-Down Regulator with
Internal Synchronous Rectification in QFN Package
Soft-Start
Soft-start allows a gradual increase of the internal cur-
rent limit to reduce input surge currents at startup and
at exit from shutdown. A timing capacitor, CSS, placed
from SS to GND sets the rate at which the internal cur-
rent limit is changed. Upon power-up, when the device
comes out of undervoltage lockout (2.6V typ) or after
the SHDN pin is pulled high, a 4µA constant-current
source charges the soft-start capacitor and the voltage
on SS increases. When the voltage on SS is less than
approximately 0.7V, the current limit is set to zero. As
the voltage increases from 0.7V to approximately 1.8V,
the current limit is adjusted from 0 to the current-limit
threshold (see the Electrical Characteristics). The volt-
age across the soft-start capacitor changes with time
according to the equation:
VSS
=
4µA ×
CSS
t
The soft-start current limit varies with the voltage on the
soft-start pin, SS, according to the equation:
SSILIMIT
=
VSS 0.7V
1.1V
×
ILIMIT
where ILIMIT is the current threshold from the Electrical
Characteristics.
The constant-current source stops charging once the
voltage across the soft-start capacitor reaches 1.8V
(Figure 5).
Frequency Variation with Output Current
The operating frequency of the MAX1843 is determined
primarily by tOFF (set by RTOFF), VIN, and VOUT as
shown in the following formula:
fPWM = (VIN - VOUT - VPMOS) / [tOFF (VIN - VPMOS +
VNMOS)]
However, as the output current increases, the voltage
drop across the NMOS and PMOS switches increases
and the voltage across the inductor decreases. This
causes the frequency to drop. The change in frequency
can be approximated with the following formula:
fPWM = -IOUT x RPMOS / (VIN x tOFF)
where RPMOS is the resistance of the internal MOSFETs
(90mtyp).
SHDN
0
VSS (V)
0
ILIMIT (A)
0
1.8V
0.7V
ILIMIT
t
Figure 5. Soft-Start Current-Limit Over Time
Circuit Layout and Grounding
Good layout is necessary to achieve the MAX1843s
intended output power level, high efficiency, and low
noise. Good layout includes the use of ground planes,
careful component placement, and correct routing of
traces using appropriate trace widths. The following
points are in order of decreasing importance:
1) Minimize switched-current and high-current ground
loops. Connect the input capacitors ground, the out-
put capacitors ground, and PGND. Connect the
resulting island to GND at only one point.
2) Connect the input filter capacitor less than 5mm
away from IN. The connecting copper trace carries
large currents and must be at least 1mm wide,
preferably 2.5mm.
3) Place the LX node components as close together
and as near to the device as possible. This reduces
resistive and switching losses as well as noise.
4) Ground planes are essential for optimum perfor-
mance. In most applications, the circuit is located on
a multilayer board and full use of the four or more
layers is recommended. For heat dissipation, con-
nect the exposed backside pad to a large analog
ground plane, preferably on a surface of the board
that receives good airflow. If the ground plane is
located on the IC surface, make use of the N.C. pins
adjacent to GND to lower thermal resistance to the
ground plane. If the ground is located elsewhere,
use several vias to lower thermal resistance. Typical
applications use multiple ground planes to minimize
thermal resistance. Avoid large AC currents through
the analog ground plane.
Chip Information
TRANSISTOR COUNT: 3662
______________________________________________________________________________________ 11

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