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PDF MAX1816 Data sheet ( Hoja de datos )
| Número de pieza | MAX1816 | |
| Descripción | Dual Step-Down Controllers Plus Linear Regulator Controller | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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19-2569; Rev 0; 10/02
Dual Step-Down Controllers Plus Linear-
Regulator Controller for Notebook Computers
General Description
The MAX1816/MAX1994 are dual step-down controllers
for notebook computer applications. BUCK1 is a CPU
core regulator with dynamically adjustable output, ultra-
fast transient response, high DC accuracy, and high effi-
ciency. BUCK2 is an adjustable step-down regulator for
I/O and memory supplies. Both regulators employ Maxim’s
proprietary Quick-PWM™ control architecture. This fast-
response, constant-on-time PWM control scheme handles
wide input/output voltage ratios with ease and provides
100ns “instant” on-response to load transients, while main-
taining a relatively constant switching frequency. The
MAX1816/MAX1994 also have a linear-regulator controller
for low-voltage auxiliary power supplies.
The CPU regulator supports “active voltage positioning”
to reduce output bulk capacitance and lower power dis-
sipation. A programmable gain amplifier allows the use
of lower value sense resistors. Four fixed-gain settings
are available (0, 1.5, 2, and 4). A differential remote-
sense amplifier is also included to more accurately con-
trol the voltage at the load. Accuracy is further
enhanced with an internal integrator.
The MAX1816/MAX1994 include a specialized digital
interface that makes them suitable for mobile CPU and
video processor applications. The power-good
(PGOOD) output for the core regulator is forced high
during VID transitions, and the LINGOOD output for the
linear regulator includes a 1ms (min) turn-on delay.
BUCK1, BUCK2, and the linear regulator feature overvolt-
age protection (OVP). The detection threshold for BUCK1
is adjusted with an external resistive voltage-divider, while
the OVP thresholds for BUCK2 and the linear regulator
are fixed. Connecting the OVPSET pin to VCC disables
OVP for BUCK1 and BUCK2, but not the linear regulator.
The MAX1816 features an output-voltage adjustment
range from 0.6V to 1.75V. Similarly, the MAX1994 is
adjustable from 0.925V to 2.0V, using an alternate VID
code set. While in suspend mode, the adjustment range
is 0.7V to 1.075V for both the MAX1816 and MAX1994.
Both parts are available in 48-pin thin QFN packages.
Applications
Mobile CPU Core and Video Processors
Memory I/O and VID Supplies
3- to 4-Cell Li+ Battery to CPU Core Supply
Small Notebook Computers
Features
o Dual Quick-PWM Architecture
o ±1% VOUT Accuracy
o 5-Bit On-Board D/A Converter
o +0.60V to +1.75V Output Adjust Range (MAX1816)
o +0.70V to +2.00V Output Adjust Range (MAX1994)
o Voltage-Positioning Gain and Offset Control
o +2V to +28V Battery Input Range
o Differential Remote Sense (BUCK1)
o Linear-Regulator Controller
o 200/300/550/1000kHz Switching Frequency
o 2.2mA (typ) ICC Supply Current
o 20µA (max) Shutdown Supply Current
o Independent Power-Good Outputs
(PGOOD, LINGOOD)
PART
MAX1816ETM
MAX1994ETM
Ordering Information
TEMP RANGE
-40°C to +100°C
-40°C to +100°C
PIN-PACKAGE
48 Thin QFN
48 Thin QFN
Pin Configuration
TOP VIEW
ILIM1
CC
CS1+
CS1-
FBS
GDS
GAIN
OFS0
OFS1
OFS2
SUS
DPSLP
1
2
3
4
5
6
7
8
9
10
11
12
MAX1816
MAX1994
36 ILIM2
35 CS2
34 OUT2
33 FB2
32 REF
31 VCC
30 AGND
29 LINBSE
28 LINGOOD
27 LINFB
26 TIME
25 OVPSET
Quick-PWM is a trademark of Maxim Integrated Products, Inc.
THIN QFN 7mm × 7mm
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
Dual Step-Down Controllers Plus Linear-
Regulator Controller for Notebook Computers
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V+ = 15V, VOUT1 = 1.20V, VOUT2 = 2.50V, VCC = VDD = 5.0V, VSKP1/SDN = VSKP2/SDN = VLIN/SDN = 5.0V,
TA = 0°C to +85°C. Typical values are at TA = +25°C, unless otherwise noted.)
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
ILIM1 Default Threshold
VCC -
1.5
VCC -
1.0
VCC -
0.5
V
BUCK1 Current-Limit Threshold
(Fixed)
CS1+ - CS1-; VILIM1 = VCC
40 50 60 mV
BUCK1 Current-Limit Threshold
(Adjustable)
CS1+ - CS1-; VILIM1 = 0.5V
CS1+ - CS1-; VILIM1 = 2.0V
40 50 60
mV
160 200 240
BUCK1 Negative Current-Limit
Threshold (Fixed)
ILIM1 Input Bias Current
CS2 Input Bias Current
ILIM2 Default Threshold
BUCK2 Current-Limit Threshold
(Fixed)
CS1+ - CS1-; VILIM1 = VCC
0 to 2V
0 to 28V
AGND - CS2; VILIM2 = VCC
-90
-100
-1
VCC -
1.5
40
-72 -55
VCC -
1.0
+100
+1
VCC -
0.5
50 60
mV
nA
µA
V
mV
BUCK2 Current-Limit Threshold
(Adjustable)
AGND - CS2; VILIM2 = 0.5V
AGND - CS2; VILIM2 = 2.0V
40 50 60
mV
160 200 240
BUCK2 Negative Current-Limit
Threshold (Fixed)
ILIM2 Input Bias Current
Thermal-Shutdown Threshold
VCC Undervoltage Lockout
Threshold
DH1 Gate-Driver On-Resistance
DL1 Gate-Driver On-Resistance
DH1 Gate-Driver Source/Sink
Current
DL1 Gate-Driver Sink Current
DL1 Gate-Driver Source Current
Dead Time
DH2 Gate-Driver On-Resistance
DL2 Gate-Driver On-Resistance
AGND - CS2; VILIM2 = VCC
0 to 2V
15°C hysteresis
Rising edge, hysteresis = 20mV
BST1–LX1 forced to 5V (Note 4)
DL1 high state (pullup) (Note 4)
DL1 low state (pulldown) (Note 4)
DH1 forced to 2.5V, BST–LX forced to 5V
DL1 forced to 2.5V
DL1 forced to 2.5V
DL1 rising
DH1 rising
BST2–LX2 forced to 5V (Note 4)
DL2 high state (pullup) (Note 4)
DL2 low state (pulldown) (Note 4)
-90
-100
4.10
-72
160
1
1
0.35
1.5
5
1.5
35
26
2
2
0.7
-55
+100
4.45
4.5
4.5
2
8
8
3
mV
nA
oC
V
Ω
Ω
A
A
A
ns
Ω
Ω
_______________________________________________________________________________________ 5
5 Page 
Dual Step-Down Controllers Plus Linear-
Regulator Controller for Notebook Computers
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V+ = 15V, VOUT1 = 1.20V, VOUT2 = 2.50V, VCC = VDD = 5.0V, VSKP1/SDN = VSKP2/SDN = VLIN/SDN = 5.0V,
TA = -40°C to +100°C, unless otherwise noted.) (Note 6)
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
SKP1/SDN, SKP2/SDN Skip
Level
SKP1/SDN, SKP2/SDN logic input high level
2.8
V
SKP1/SDN, SKP2/SDN PWM
Level
SKP1/SDN, SKP2/SDN logic input float level
1.4 2.2 V
SKP1/SDN, SKP2/SDN Shutdown
Level
SKP1/SDN, SKP2/SDN logic input low level
0.4 V
PGOOD Lower Trip Threshold
Measured at FBS, OUT2, and FB2 with respect to unloaded
output voltage, falling edge, typical hysteresis = 1%
-12.5
-7.5 %
LINGOOD Lower Trip Threshold
and LINFB Undervoltage
Protection Threshold
Measured at LINFB with respect to unloaded output
voltage, falling edge (Note 5)
-12.5
-7.5 %
PGOOD Upper Trip Threshold
Measured at FBS, OUT_, FB2 with respect to unloaded
output voltage, rising edge, typical hysteresis = 1%
7.5
12.5 %
LINGOOD Upper Trip Threshold
and LINFB Overvoltage Trip
Threshold
Measured at LINFB with respect to unloaded output
voltage, rising edge (Note 5)
7.5
12.5 %
LINGOOD Turn-On Delay
Open-Drain Output Low Voltage
(PGOOD, LINGOOD)
LINFB forced 2% above LINGOOD lower trip threshold
ISINK = 3mA
1
ms
0.4 V
OFS Positive Offset when
Programmed to Zero
OFS Gain
Deviation in the output voltage when tested with OFS_
connected to REF
∆VOUT / ∆VOFS, ∆VOFS = (0.8V - 0V)
∆VOUT / ∆VOFS, ∆VOFS = (2.0V - 1.2V)
0.119
0.119
2
0.131
0.131
mV
V/V
Note 1: DC output accuracy specifications for BUCK2 refer to the trip level of the error amp. The output voltage has a DC regulation
higher than the trip level by 50% of the ripple. In SKIP mode, the output rises by approximately 1.5% when transitioning from
continuous conduction to no load.
Note 2: On-time and minimum off-time specifications for both BUCK1 and BUCK2 are measured from 50% to 50% at the DH_ pin
with LX_ forced to zero, BST_ forced to 5V, and a 500pF capacitor from DH_ to LX_ to simulate external MOSFET gate
capacitance. Actual in-circuit times can be different due to MOSFET switching speeds.
Note 3: This does not include the time for REF to start up if required.
Note 4: Production testing limitations due to package handling require relaxed maximum on-resistance specifications for the thin
QFN package.
Note 5: The LINGOOD signal is latched low under a fault condition of LINFB dropping below 90% or rising above 110% of the nomi-
nal set point. The LINGOOD signal does not go high again until the fault latch is reset.
Note 6: Specifications from -40°C to +100°C are guaranteed by design, not production tested.
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MAX1816.PDF ] | |
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