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PDF MAX6314 Data sheet ( Hoja de datos )
| Número de pieza | MAX6314 | |
| Descripción | 68HC11/Bidirectional-Compatible P Reset Circuit | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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19-1090; Rev 1; 1/99
68HC11/Bidirectional-Compatible
µP Reset Circuit
General Description
The MAX6314 low-power CMOS microprocessor (µP)
supervisory circuit is designed to monitor power
supplies in µP and digital systems. The MAX6314’s
RESET output is bidirectional, allowing it to be directly
connected to µPs with bidirectional reset inputs, such
as the 68HC11. It provides excellent circuit reliability
and low cost by eliminating external components and
adjustments. The MAX6314 also provides a debounced
manual reset input.
This device performs a single function: it asserts a reset
signal whenever the VCC supply voltage falls below a
preset threshold or whenever manual reset is
asserted. Reset remains asserted for an internally pro-
grammed interval (reset timeout period) after VCC has
risen above the reset threshold or manual reset is
deasserted.
The MAX6314 comes with factory-trimmed reset
threshold voltages in 100mV increments from 2.5V
to 5V. Preset timeout periods of 1ms, 20ms, 140ms,
and 1120ms (minimum) are also available. The device
comes in a SOT143 package.
For a µP supervisor with an open-drain reset pin, see
the MAX6315 data sheet.
________________________Applications
Features
o Small SOT143 Package
o RESET Output Simplifies Interface to
Bidirectional Reset I/Os
o Precision Factory-Set VCC Reset Thresholds:
100mV Increments from 2.5V to 5V
o ±1.8% Reset Threshold Accuracy at TA = +25°C
o ±2.5% Reset Threshold Accuracy Over Temp.
o Four Reset Timeout Periods Available:
1ms, 20ms, 140ms, or 1120ms (minimum)
o Immune to Short VCC Transients
o 5µA Supply Current
o Pin-Compatible with MAX811
Ordering and Marking Information appears at end of
data sheet.
Computers
Controllers
Intelligent Instruments
Critical µP and µC Power Monitoring
Portable/Battery-Powered Equipment
Pin Configuration
TOP VIEW
GND 1
MAX6314
4 VCC
RESET 2
3 MR
SOT143
Typical Operating Circuit
VCC
VCC
LASER-
TRIMMED
RESISTORS
VCC
68HC11**
RESET
CIRCUITRY
MR
4.7k
RESET
µP
RESET
MAX6314 GND
**OR OTHER µC/µP WITH BIDIRECTIONAL RESET I/O PIN.
* Patents Pending
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
1 page  
68HC11/Bidirectional-Compatible
µP Reset Circuit
_______________Detailed Description
The MAX6314 has a reset output consisting of a 4.7kΩ
pull-up resistor in parallel with a P-channel transistor
and an N-channel pull down (Figure 1), allowing this IC
to directly interface with microprocessors (µPs) that
have bidirectional reset pins (see the Reset Output
section).
Reset Output
A µP’s reset input starts the µP in a known state. The
MAX6314 asserts reset to prevent code-execution
errors during power-up, power-down, or brownout
conditions. RESET is guaranteed to be a logic low for
VCC > 1V (see the Electrical Characteristics). Once
VCC exceeds the reset threshold, the internal timer
keeps reset asserted for the reset timeout period (tRP);
after this interval RESET goes high. If a brownout condi-
tion occurs (monitored voltage dips below its pro-
grammed reset threshold), RESET goes low. Any time
VCC dips below the reset threshold, the internal timer
resets to zero and RESET goes low. The internal timer
starts when VCC returns above the reset threshold, and
RESET remains low for the reset timeout period.
The MAX6314’s RESET output is designed to interface
with µPs that have bidirectional reset pins, such as the
Motorola 68HC11. Like an open-drain output, the
MAX6314 allows the µP or other devices to pull RESET
low and assert a reset condition. However, unlike a
standard open-drain output, it includes the commonly
specified 4.7kΩ pull-up resistor with a P-channel active
pull-up in parallel.
This configuration allows the MAX6314 to solve a prob-
lem associated with µPs that have bidirectional reset
pins in systems where several devices connect to
RESET. These µPs can often determine if a reset was
asserted by an external device (i.e., the supervisor IC)
or by the µP itself (due to a watchdog fault, clock error,
or other source), and then jump to a vector appropriate
for the source of the reset. However, if the µP does
assert reset, it does not retain the information, but must
determine the cause after the reset has occurred.
The following procedure describes how this is done
with the Motorola 68HC11. In all cases of reset, the µP
pulls RESET low for about four E-clock cycles. It then
releases RESET, waits for two E-clock cycles, then
checks RESET’s state. If RESET is still low, the µP con-
cludes that the source of the reset was external and,
when RESET eventually reaches the high state, jumps
to the normal reset vector. In this case, stored state
information is erased and processing begins from
scratch. If, on the other hand, RESET is high after the
two E-clock cycle delay, the processor knows that it
caused the reset itself and can jump to a different vec-
tor and use stored state information to determine what
caused the reset.
The problem occurs with faster µPs; two E-clock cycles
is only 500ns at 4MHz. When there are several devices
on the reset line, the input capacitance and stray
capacitance can prevent RESET from reaching the
logic-high state (0.8 x VCC) in the allowed time if only a
passive pull-up resistor is used. In this case, all resets
will be interpreted as external. The µP is guaranteed to
sink only 1.6mA, so the rise time cannot be much
reduced by decreasing the recommended 4.7kΩ
pull-up resistance.
The MAX6314 solves this problem by including a pull-
up transistor in parallel with the recommended 4.7kΩ
resistor (Figure 1). The pull-up resistor holds the output
high until RESET is forced low by the µP reset I/O, or by
the MAX6314 itself. Once RESET goes below 0.5V, a
comparator sets the transition edge flip-flop, indicating
that the next transition for RESET will be low to high. As
soon as RESET is released, the 4.7kΩ resistor pulls
RESET up toward VCC. When RESET rises above 0.5V,
the active P-channel pull-up turns on for the 2µs
duration of the one-shot. The parallel combination of the
4.7kΩ pull-up and the P-channel transistor on-
resistance quickly charges stray capacitance on the
reset line, allowing RESET to transition low to high with-
in the required two E-clock period, even with several
devices on the reset line (Figure 2). Once the one-shot
times out, the P-channel transistor turns off. This
process occurs regardless of whether the reset was
caused by VCC dipping below the reset threshold, MR
being asserted, or the µP or other device asserting
RESET. Because the MAX6314 includes the standard
4.7kΩ pull-up resistor, no external pull-up resistor is
required. To minimize current consumption, the internal
pull-up resistor is disconnected whenever the MAX6314
asserts RESET.
Manual Reset Input
Many µP-based products require manual reset capabil-
ity, allowing the operator, a test technician, or external
logic circuitry to initiate a reset. A logic low on MR
asserts reset. Reset remains asserted while MR is low,
and for the reset active timeout period after MR returns
high. To minimize current consumption, the internal
4.7kΩ pull-up resistor on RESET is disconnected
whenever RESET is asserted.
_______________________________________________________________________________________ 5
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